Motorola MPC860 PowerQUICC User Manual page 172

Part II. PowerPC Microprocessor Module
Table 6-19 lists the cache instructions that are accessible to user-level programs.
Name
Data Cache Block Touch
Data Cache Block Touch for
Store
Data Cache Block Set to Zero dcbz
Data Cache Block Store
Data Cache Block Flush
Instruction Cache Block
Invalidate
6.2.6 PowerPC OEA Instructions
The PowerPC OEA includes the structure of the memory management model,
supervisor-level registers, and the exception model.
6.2.6.1 System Linkage Instructions
This section describes system linkage instructions (see Table 6-20). The sc instruction is a
user-level instruction that permits a user program to call on the system to perform a service
and causes the processor to take an exception. The Return from Interrupt (rÞ) instruction is
a supervisor-level instruction that is useful for returning from an exception handler.
System Call
Return from Interrupt
6.2.6.2 Processor Control InstructionsÑOEA
Processor control instructions are used to read from and write to the condition register
(CR), machine state register (MSR), and special-purpose registers (SPRs), and to read from
the time base register (TBU or TBL).
6.2.6.2.1 Move to/from Machine State Register Instructions
Table 6-15 lists the instructions provided by the MPC860 for reading from or writing to the
MSR.
Table 6-21. Move to/from Machine State Register Instructions
Move to Machine State Register
Move from Machine State Register
6-22
Table 6-19. User-Level Cache Instructions
Mnemonic Syntax
dcbt rA,rB The appropriate cache block is checked for a hit. If it is a miss,
the instruction is treated as a regular miss, except that bus
dcbtst rA,rB
error does not cause an exception. If no error occurs, the cache
is updated.
rA,rB Executes as deÞned in the VEA.
dcbst rA,rB Executes as deÞned in the VEA.
dcbf rA,rB Executes as deÞned in the VEA.
icbi rA,rB The MMU translates the EA and the associated instruction
cache block is invalidated if hit.
Table 6-20. System Linkage Instructions
Name
Name
MPC860 PowerQUICC UserÕs Manual
MPC860 Notes
Mnemonic Syntax
sc
rÞ
Mnemonic Syntax
mtmsr rS
mfmsr rD
Ñ
Ñ
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