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Read from U-Bus
The following describes the conÞguration of the port B registers for PIP operation; see also
Section 34.3.1, ÒThe Port B Registers.Ó
¥ Port B assignment register (PBPAR). To use port B for PIP, clear the corresponding
PBPAR bits and conÞgure PIPC[MODH] and PIPC[MODL]. See Section 34.3.1.4,
ÒPort B Pin Assignment Register (PBPAR).Ó
¥ Port B data direction register (PBDIR). ConÞgures the data signals PBDAT as inputs
or outputs. The direction settings for the handshake signals PB14 and PB15 are
ignored. See Section 34.3.1.3, ÒPort B Data Direction Register (PBDIR).Ó
¥ Port B data register (PBDAT) register functions as the PIP data register when the PIP
is used. Use this register to receive or transmit PIP data when the PIP is controlled
by core software. See Section 34.3.1.2, ÒPort B Data Register (PBDAT).Ó
¥ Port B open-drain register. ConÞgures the data signals PBDAT[16Ð31] as normal or
wired-OR. See Section 34.3.1.1, ÒPort B Open-Drain Register (PBODR).Ó
33.5 PIP Buffer Descriptors
The CP uses PIP receive and transmit buffer descriptors to manage the speciÞc transfer of
each buffer. Each 64-bit buffer descriptor has the following structure:
¥ The half word at offset + 0 contains status and control bits.
¥ The half word at offset + 2 contains the data length (in bytes) that is sent or received.
Ñ For an RxBD, this is the number of octets the CP writes into this RxBDÕs buffer
once the descriptor closes. The controller writes this Þeld after the received data
is placed into the associated buffer. Memory allocated for this buffer should be
no smaller than MRBLR.
Ñ For a TxBD, this is the number of octets the CP should transmit from its buffer.
However, it is never modiÞed by the CP. This value should be greater than zero.
For an 8-bit PIP, this value can be odd or even; for a 16-bit PIP, it must be even.
MOTOROLA
U-Bus
Buffer
Figure 33-8. Port B General-Purpose I/O
Chapter 33. Parallel Interface Port
Part V. The Communications Processor Module
Write from U-Bus
Latch
DIR = Output
I/O
Pin
33-11
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