Motorola MC9S12DJ256 Manuals

Manuals and User Guides for Motorola MC9S12DJ256. We have 1 Motorola MC9S12DJ256 manual available for free PDF download: User Manual

Motorola MC9S12DJ256 User Manual

Motorola MC9S12DJ256 User Manual (132 pages)

Brand: Motorola | Category: Microcontrollers | Size: 0.85 MB
Table of contents
Table Of Contents5................................................................................................................................................................
Figure 0-1 Order Partnumber Example15................................................................................................................................................................
Table 0-1 Derivative Differences15................................................................................................................................................................
Table 0-2 Document References17................................................................................................................................................................
Table 0-3 Specification Change Summary For Maskset L91n17................................................................................................................................................................
Section 1 Introductionmc9s12dt25619................................................................................................................................................................
Overview19................................................................................................................................................................
Features19................................................................................................................................................................
Modes Of Operation21................................................................................................................................................................
Block Diagram22................................................................................................................................................................
Figure 1-1 Mc9s12dt256 Block Diagram23................................................................................................................................................................
Device Memory Map24................................................................................................................................................................
Table 1-1 Device Memory Map24................................................................................................................................................................
Figure 1-2 Mc9s12dt256 Memory Map26................................................................................................................................................................
Detailed Register Map27................................................................................................................................................................
Table 1-2 Detailed Mscan Foreground Receive And Transmit Buffer Layout43................................................................................................................................................................
Part Id Assignments50................................................................................................................................................................
Table 1-3 Assigned Part Id Numbers50................................................................................................................................................................
Table 1-4 Memory Size Registers50................................................................................................................................................................
Section 2 Signal Description51................................................................................................................................................................
Device Pinout51................................................................................................................................................................
Figure 2-1 Pin Assignments In 112-pin Lqfp52................................................................................................................................................................
Signal Properties Summary53................................................................................................................................................................
Figure 2-2 Pin Assignments In 80-pin Qfp For Mc9s12dj25653................................................................................................................................................................
Table 2-1 Signal Properties53................................................................................................................................................................
Detailed Signal Descriptions56................................................................................................................................................................
Extal, Xtal - Oscillator Pins56................................................................................................................................................................
Reset - External Reset Pin56................................................................................................................................................................
Test - Test Pin57................................................................................................................................................................
Vregen - Voltage Regulator Enable Pin57................................................................................................................................................................
Xfc - Pll Loop Filter Pin57................................................................................................................................................................
Bkgd / Taghi / Modc - Background Debug, Tag High, And Mode Pin57................................................................................................................................................................
Pad15 / An15 / Etrig1 - Port Ad Input Pin Of Atd157................................................................................................................................................................
Pad[14:08] / An[14:08] - Port Ad Input Pins Of Atd157................................................................................................................................................................
Figure 2-3 Pll Loop Filter Connections57................................................................................................................................................................
Pad7 / An07 / Etrig0 - Port Ad Input Pin Of Atd058................................................................................................................................................................
Pad[06:00] / An[06:00] - Port Ad Input Pins Of Atd058................................................................................................................................................................
Pa[7:0] / Addr[15:8] / Data[15:8] - Port A I/o Pins58................................................................................................................................................................
Pb[7:0] / Addr[7:0] / Data[7:0] - Port B I/o Pins58................................................................................................................................................................
Pe7 / Noacc / Xclks - Port E I/o Pin 758................................................................................................................................................................
Figure 2-4 Colpitts Oscillator Connections (pe7=1)59................................................................................................................................................................
Figure 2-5 Pierce Oscillator Connections (pe7=0)59................................................................................................................................................................
Pe6 / Modb / Ipipe1 - Port E I/o Pin 660................................................................................................................................................................
Pe5 / Moda / Ipipe0 - Port E I/o Pin 560................................................................................................................................................................
Pe4 / Eclk - Port E I/o Pin 460................................................................................................................................................................
Pe3 / Lstrb / Taglo - Port E I/o Pin 360................................................................................................................................................................
Figure 2-6 External Clock Connections (pe7=0)60................................................................................................................................................................
Pe2 / R/w - Port E I/o Pin 261................................................................................................................................................................
Pe1 / Irq - Port E Input Pin 161................................................................................................................................................................
Pe0 / Xirq - Port E Input Pin 061................................................................................................................................................................
Ph7 / Kwh7 / Ss2 - Port H I/o Pin 761................................................................................................................................................................
Ph6 / Kwh6 / Sck2 - Port H I/o Pin 661................................................................................................................................................................
Ph5 / Kwh5 / Mosi2 - Port H I/o Pin 561................................................................................................................................................................
Ph4 / Kwh4 / Miso2 - Port H I/o Pin 261................................................................................................................................................................
Ph3 / Kwh3 / Ss1 - Port H I/o Pin 361................................................................................................................................................................
Ph2 / Kwh2 / Sck1 - Port H I/o Pin 262................................................................................................................................................................
Ph0 / Kwh0 / Miso1 - Port H I/o Pin 062................................................................................................................................................................
Pj7 / Kwj7 / Txcan4 / Scl - Port J I/o Pin 762................................................................................................................................................................
Pj6 / Kwj6 / Rxcan4 / Sda - Port J I/o Pin 662................................................................................................................................................................
Pj[1:0] / Kwj[1:0] - Port J I/o Pins [1:0]62................................................................................................................................................................
Pk7 / Ecs / Romone - Port K I/o Pin 762................................................................................................................................................................
Pk[5:0] / Xaddr[19:14] - Port K I/o Pins [5:0]63................................................................................................................................................................
Pm7 / Txcan4 - Port M I/o Pin 763................................................................................................................................................................
Pm6 / Rxcan4 - Port M I/o Pin 663................................................................................................................................................................
Pm5 / Txcan0 / Txcan4 / Sck0 - Port M I/o Pin 563................................................................................................................................................................
Pm3 / Txcan1 / Txcan0 / Ss0 - Port M I/o Pin 363................................................................................................................................................................
Pm2 / Rxcan1 / Rxcan0 / Miso0 - Port M I/o Pin 263................................................................................................................................................................
Pm1 / Txcan0 / Txb — Port M I/o Pin 164................................................................................................................................................................
Pp2 / Kwp2 / Pwm2 / Sck1 — Port P I/o Pin 265................................................................................................................................................................
Ps0 / Rxd0 - Port S I/o Pin 066................................................................................................................................................................
Pt[7:0] / Ioc[7:0] - Port T I/o Pins [7:0]66................................................................................................................................................................
Power Supply Pins66................................................................................................................................................................
Vddx,vssx - Power & Ground Pins For I/o Drivers66................................................................................................................................................................
Vddr, Vssr - Power & Ground Pins For I/o Drivers & For Internal Voltage Regulator66................................................................................................................................................................
Ps2 / Rxd1 — Port S I/o Pin 266................................................................................................................................................................
Vdd1, Vdd2, Vss1, Vss2 - Core Power Pins67................................................................................................................................................................
Vdda, Vssa - Power Supply Pins For Atd And Vreg67................................................................................................................................................................
Vrh, Vrl - Atd Reference Voltage Input Pins67................................................................................................................................................................
Vddpll, Vsspll - Power Supply Pins For Pll67................................................................................................................................................................
Table 2-2 Mc9s12dp256 Power And Ground Connection Summary67................................................................................................................................................................
Vregen - On Chip Voltage Regulator Enable68................................................................................................................................................................
Section 3 System Clock Description69................................................................................................................................................................
Figure 3-1 Clock Connections69................................................................................................................................................................
Section 4 Modes Of Operation71................................................................................................................................................................
Chip Configuration Summary71................................................................................................................................................................
Table 4-1 Mode Selection71................................................................................................................................................................
Table 4-2 Clock Selection Based On Pe771................................................................................................................................................................
Security72................................................................................................................................................................
Securing The Microcontroller72................................................................................................................................................................
Operation Of The Secured Microcontroller72................................................................................................................................................................
Table 4-3 Voltage Regulator Vregen72................................................................................................................................................................
Unsecuring The Microcontroller73................................................................................................................................................................
Low Power Modes73................................................................................................................................................................
Stop73................................................................................................................................................................
Pseudo Stop73................................................................................................................................................................
Wait73................................................................................................................................................................
Run74................................................................................................................................................................
Section 5 Resets And Interrupts75................................................................................................................................................................
Vectors75................................................................................................................................................................
Vector Table75................................................................................................................................................................
Table 5-1 Interrupt Vector Locations75................................................................................................................................................................
Effects Of Reset77................................................................................................................................................................
I/o Pins77................................................................................................................................................................
Memory77................................................................................................................................................................
Cpu12 Block Description79................................................................................................................................................................
Hcs12 Breakpoint (bkp) Block Description80................................................................................................................................................................
Figure 20-1 Recommended Pcb Layout For 112lqfp Colpitts Oscillator84................................................................................................................................................................
Figure 20-2 Recommended Pcb Layout For 80qfp Colpitts Oscillator85................................................................................................................................................................
Figure 20-3 Recommended Pcb Layout For 112lqfp Pierce Oscillator86................................................................................................................................................................
Figure 20-4 Recommended Pcb Layout For 80qfp Pierce Oscillator87................................................................................................................................................................
Appendix A Electrical Characteristics89................................................................................................................................................................
General89................................................................................................................................................................
Parameter Classification89................................................................................................................................................................
Power Supply89................................................................................................................................................................
A.1 General89................................................................................................................................................................
Pins90................................................................................................................................................................
A.1.3 Pins90................................................................................................................................................................
Current Injection91................................................................................................................................................................
Absolute Maximum Ratings91................................................................................................................................................................
Table A-1 Absolute Maximum Ratings91................................................................................................................................................................
A.1.4 Current Injection91................................................................................................................................................................
Esd Protection And Latch-up Immunity92................................................................................................................................................................
Table A-2 Esd And Latch-up Test Conditions92................................................................................................................................................................
Table A-3 Esd And Latch-up Protection Characteristics92................................................................................................................................................................
Operating Conditions93................................................................................................................................................................
Power Dissipation And Thermal Characteristics93................................................................................................................................................................
Table A-4 Operating Conditions93................................................................................................................................................................
A.1.7 Operating Conditions93................................................................................................................................................................
I/o Characteristics95................................................................................................................................................................
Table A-5 Thermal Package Characteristics95................................................................................................................................................................
A.1.9 I/o Characteristics95................................................................................................................................................................
Table A-6 5v I/o Characteristics96................................................................................................................................................................
Supply Currents97................................................................................................................................................................
A.1.10 Supply Currents97................................................................................................................................................................
Table A-7 Supply Current Characteristics98................................................................................................................................................................
Atd Characteristics99................................................................................................................................................................
Atd Operating Characteristics99................................................................................................................................................................
Factors Influencing Accuracy99................................................................................................................................................................
Table A-8 Atd Operating Characteristics99................................................................................................................................................................
A.2 Atd Characteristics99................................................................................................................................................................
Table A-9 Atd Electrical Characteristics100................................................................................................................................................................
Atd Accuracy101................................................................................................................................................................
Table A-10 Atd Conversion Performance101................................................................................................................................................................
A.2.3 Atd Accuracy101................................................................................................................................................................
Figure A-1 Atd Accuracy Definitions102................................................................................................................................................................
Nvm, Flash And Eeprom103................................................................................................................................................................
Nvm Timing103................................................................................................................................................................
Table A-11 Nvm Timing Characteristics104................................................................................................................................................................
Nvm Reliability106................................................................................................................................................................
Table A-12 Nvm Reliability Characteristics106................................................................................................................................................................
A.3.2 Nvm Reliability106................................................................................................................................................................
Figure A-2 Typical Endurance Vs Temperature107................................................................................................................................................................
Voltage Regulator109................................................................................................................................................................
Table A-13 Voltage Regulator Recommended Load Capacitances109................................................................................................................................................................
A.4 Voltage Regulator109................................................................................................................................................................
Reset, Oscillator And Pll111................................................................................................................................................................
Startup111................................................................................................................................................................
Table A-14 Startup Characteristics111................................................................................................................................................................
Oscillator112................................................................................................................................................................
Table A-15 Oscillator Characteristics112................................................................................................................................................................
A.5.2 Oscillator112................................................................................................................................................................
Phase Locked Loop113................................................................................................................................................................
Figure A-3 Basic Pll Functional Diagram113................................................................................................................................................................
Figure A-4 Jitter Definitions115................................................................................................................................................................
Figure A-5 Maximum Bus Clock Jitter Approximation115................................................................................................................................................................
Table A-16 Pll Characteristics116................................................................................................................................................................
Mscan117................................................................................................................................................................
Table A-17 Mscan Wake-up Pulse Characteristics117................................................................................................................................................................
A.6 Mscan117................................................................................................................................................................
Spi119................................................................................................................................................................
Master Mode119................................................................................................................................................................
Figure A-6 Spi Master Timing (cpha=0)119................................................................................................................................................................
Table A-18 Measurement Conditions119................................................................................................................................................................
A.7.1 Master Mode119................................................................................................................................................................
Figure A-7 Spi Master Timing (cpha=1)120................................................................................................................................................................
Table A-19 Spi Master Mode Timing Characteristics120................................................................................................................................................................
Slave Mode121................................................................................................................................................................
Figure A-8 Spi Slave Timing (cpha=0)121................................................................................................................................................................
A.7.2 Slave Mode121................................................................................................................................................................
Figure A-9 Spi Slave Timing (cpha=1)122................................................................................................................................................................
Table A-20 Spi Slave Mode Timing Characteristics122................................................................................................................................................................
External Bus Timing123................................................................................................................................................................
General Muxed Bus Timing123................................................................................................................................................................
Figure A-10 General External Bus Timing124................................................................................................................................................................
Appendix B Package Information127................................................................................................................................................................
B.1 General127................................................................................................................................................................
112-pin Lqfp Package128................................................................................................................................................................
Figure B-1 112-pin Lqfp Mechanical Dimensions (case No. 987)128................................................................................................................................................................
80-pin Qfp Package129................................................................................................................................................................
Figure B-2 80-pin Qfp Mechanical Dimensions (case No. 841b)129................................................................................................................................................................

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