Part IV. Hardware Interface
CLKOUT
BR
Receive BG and BB negated
BG
Assert BB, drive address and assert TS
BB
A[0Ð31]
R/W
TSIZ[0Ð1], AT[0Ð3]
BURST
TS
Data
TA
Data is Valid
Figure 14-5. Single-Beat Read CycleÐBasic TimingÐZero Wait States
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MPC860 PowerQUICC UserÕs Manual
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