Motorola MPC860 PowerQUICC User Manual page 825

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30.5.7 SMC GCI C/I Channel RxBD
The GCI C/I channel RxBD, shown in Figure 30-18, is used by the CP to report on the C/I
channel receive byte. The RxBD itself receives the C/I data.
0
1
Offset + 0
E
Table 30-22 describes SMC C/I channel RxBD Þelds
Table 30-22. SMC C/I Channel RxBD Field Descriptions
Bits
Name
0
E
Empty.
0 Cleared by the CP to indicate that the byte associated with this BD is available to the core.
1 The core sets E to indicate that the byte associated with this BD has been read.
Note that additional data received is discarded until E bit is set.
1Ð7
Ñ
Reserved, should be cleared.
8Ð13
C/I Data Command/indication data bits. For C/I channel 0, bits 10Ð13 contain the 4-bit data Þeld and bits
8Ð9 are always written with zeros. For C/I channel 1, bits 8Ð13 contain the 6-bit data Þeld.
14Ð15 Ñ
Reserved, should be cleared.
30.5.8 SMC GCI C/I Channel TxBD
The GCI C/I channel TxBD, shown in Figure 30-19, is used by the CP to report on the C/I
channel transmit byte. The TxBD itself contains the C/I data to be sent.
0
1
Offset + 0
R
Table 30-23 describes SMC C/I channel TxBD Þelds.
Table 30-23. SMC C/I Channel TxBD Field Descriptions
Bits
Name
0
R
Ready.
0 Cleared by the CP after transmission to indicate that the BD is available to the core.
1 Set by the core when data associated with this BD is ready for transmission.
1Ð7
Ñ
Reserved, should be cleared.
8Ð13
C/I Data Command/indication data bits. For C/I channel 0, bits 10Ð13 hold the 4-bit data Þeld (bits 8 and 9
should be written with zeros). For C/I channel 1, bits 8Ð13 contain the 6-bit data Þeld.
14Ð15 Ñ
Reserved, should be cleared.
MOTOROLA
2
3
4
5
6
Ñ
Figure 30-18. SMC C/I Channel RxBD
2
3
4
5
6
Ñ
Figure 30-19. SMC C/I Channel
Chapter 30. Serial Management Controllers
Part V. The Communications Processor Module
7
8
9
10
11
C/I Data
Description
7
8
9
10
11
C/I Data
TxBD
Description
12
13
14
15
Ñ
12
13
14
15
Ñ
30-35

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