Motorola MPC860 PowerQUICC User Manual page 768

Part V. The Communications Processor Module
Bit 0 1 2
Field HBC FC RSH IAM
Reset
R/W
Addr
Table 28-6 describes PSMR Þelds.
Bits Name
0 HBC Heartbeat checking.
0 No heartbeat checking is performed. Do not wait for a collision after transmission.
1 Wait 20 transmit clocks or 2 ms for a collision asserted by the transceiver after transmission. The HB
bit in the TxBD is set if the heartbeat is not heard within 20 transmit clocks.
1 FC Force collision.
0 Normal operation.
1 The channel forces a collision when each frame is sent. To test collision logic conÞgure the MPC860
in loopback operation. In the end, the retry limit for each transmit frame is exceeded.
2 RSH Receive short frames.
0 Discard short frames that are not as long as MINFLR.
1 Receive short frames.
3 IAM Individual address mode.
0 Normal operation. A single 48-bit physical address in PADDR1 is checked when it is received.
1 The individual hash table is used to check all individual addresses that are received.
4Ð5 CRC CRC selection. Only CRC = 10 is valid. Complies with Ethernet speciÞcations. 32-bit CCITT-CRC.
X32 + X26 + X23 + X22 + X16 + X12 + X11 + X10 + X8 + X7 + X5 + X4 + X2 + X1 +1.
6 PRO Promiscuous.
0 Check the destination address of incoming frames.
1 Receive the frame regardless of its address unless REJECT is asserted as it is being received.
7 BRO Broadcast address.
0 Receive all frames containing the broadcast address.
1 Reject all frames containing the broadcast address, unless PRO = 1.
8 SBT Stop backoff timer.
0 The backoff timer is functioning normally.
1 The backoff timer for the random wait after a collision is stopped when carrier sense is active.
Retransmission is less aggressive than the maximum allowed in IEEE 802.3. The persistence
(P_PER) feature in the parameter RAM can be used in combination with or in place of SBT.
9 LPB Loopback operation.
0 Normal operation.
1 External loopback is used if GSMR[DIAG] is set for normal operation; internal loopback is used if
DIAG is conÞgured for loopback operation.
10 SIP Sample input pins.
0 Normal operation.
1 After a frame is received, the value on PB(16Ð23) is sampled and written to the end of the last buffer
of the frame. This value is called a tag byte. If the frame is discarded, the tag byte is also discarded.
28-20
3 4 5 6
CRC PRO BRO SBT
0000_0000_0000_0000
0xA08 (PSMR1), 0xA28 (PSMR2), 0xA48 (PSMR3), 0xA68 (PSMR4)
Figure 28-7. Ethernet Mode Register (PSMR)
Table 28-6. PSMR Field Descriptions
MPC860 PowerQUICC UserÕs Manual
7 8 9 10 11
LPB SIP LCW
R/W
Description
12 13 14 15
NIB FDE
MOTOROLA