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Part V. The Communications Processor Module
24.1 SCC HDLC Features
The main features of an SCC in HDLC mode are follows:
¥ Flexible buffers with multiple buffers per frame
¥ Separate interrupts for frames and buffers (Rx and Tx)
¥ Received-frames threshold to reduce interrupt overhead
¥ Can be used with the SCC DPLL
¥ Four address comparison registers with mask
¥ Maintenance of Þve 16-bit error counters
¥ Flag/abort/idle generation and detection
¥ Zero insertion/deletion
¥ 16- or 32-bit CRC-CCITT generation and checking
¥ Detection of nonoctet aligned frames
¥ Detection of frames that are too long
¥ Programmable ßags (0Ð15) between successive frames
¥ Automatic retransmission in case of collision
24.2 SCC HDLC Channel Frame Transmission
The HDLC transmitter is designed to work with little or no core intervention. Once enabled
by the core, a transmitter starts sending ßags or idles as programmed in the HDLC mode
register (PSMR). The HDLC polls the Þrst BD in the TxBD table. When there is a frame to
transmit, the SCC fetches the data from memory and starts sending the frame after sending
the minimum number of ßags speciÞed between frames. When the end of the current buffer
is reached and TxBD[L] (last buffer in frame) is set, the CRC and closing ßag are appended.
In HDLC mode, the lsb of each octet and the msb of the CRC are sent Þrst. Figure 24-1
shows a typical HDLC frame.
Opening Flag
Address
8 bits
16 bits
After a closing ßag is sent, the SCC updates the frame status bits of the BD and clears
TxBD[R] (buffer ready). At the end of the current buffer, if TxBD[L] is not set (multiple
buffers per frame), only TxBD[R] is cleared. Before the SCC proceeds to the next TxBD in
the table, an interrupt can be issued if TxBD[I] is set. This interrupt programmability allows
the core to intervene after each buffer, after a speciÞc buffer, or after each frame.
The
STOP TRANSMIT
linked buffers or to support efÞcient error handling. When the SCC receives a
command, it sends idles or ßags instead of the current frame until it receives a
TRANSMIT
RESTART TRANSMIT
24-2
Control
8 bits
Figure 24-1. HDLC Framing Structure
command can be used to expedite critical data ahead of previously
command. The
GRACEFUL STOP TRANSMIT
MPC860 PowerQUICC UserÕs Manual
Information (Optional)
8n bits
CRC
Closing Flag
16 bits
8 bits
command can be used to
MOTOROLA
STOP
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