Motorola MPC860 PowerQUICC User Manual page 932

Part V. The Communications Processor Module
Table 36-15. FIR6 Coefficient, Input, and Output Buffers
imaginary{C(0)}
imaginary{C(1)}
imaginary{C(k-1)}
36.11.5.2 FIR6 Function Descriptor
The FIR6 function descriptor is shown in Figure 36-21.
0 1
Offset + 0 S Ñ
Offset + 0x2
Offset + 0x4
Offset + 0x6
Offset + 0x8
Offset + 0xA
Offset + 0xC
Offset + 0xE
The status and control bits (at offset 0x00) are described in Table 36-2. The FIR6 parameter
packet consists of seven 16-bit entries and is described in Table 36-16.
Address Name
Hword 1 I Number_of_iterations
Hword 2 K Number_of_taps - 1. The number of taps should be a multiple of 2.
Hword 3 CBASE Filter coefÞcient vector base address
36-18
CoefÞcients Input Samples
real{C(0)}
real{C(1)}
*
*
real{C(k-1)}
2 3 4 5
W I Ñ IALL
Figure 36-21. FIR6 Function Descriptor
Table 36-16. FIR6 Parameter Packet
MPC860 PowerQUICC UserÕs Manual
Output
*
*
x(n-k+1) imaginary{Y(n-k+1)}
* real{Y(n-k+1)}
*
x(n-2)
x(n-1) imaginary{Y(n-2)}
x(n) real{Y(n-2)}
imaginary{Y(n-1)}
real{Y(n-1)}
imaginary{Y(n)}
real{Y(n)}
6 7 8 9 10
INDEX PC Ñ Ñ
I
K
CBASE
M
XYPTR
N
Ñ
Description
*
*
*
*
11 12 13 14
00110
MOTOROLA
15