Motorola MPC860 PowerQUICC User Manual page 831

Part V. The Communications Processor Module
31.3.2 The SPI as a Slave Device
In slave mode, the SPI receives messages from an SPI master and sends a simultaneous
reply. The slaveÕs SPISEL must be asserted before Rx clocks are recognized; once SPISEL
is asserted, SPICLK becomes an input from the master to the slave. SPICLK can be any
frequency from DC to BRGCLK/2 (12.5 MHz for a 25-MHz system).
To prepare for data transfers, the slaveÕs core writes data to be sent into a buffer, conÞgures
a TxBD with TxBD[R] set, and conÞgures one or more RxBDs. The core then sets
SPCOM[STR] to activate the SPI. Once SPISEL is asserted, the slave shifts data out from
SPIMISO and in through SPIMOSI. A maskable interrupt is issued when a full buffer
Þnishes receiving and sending or after an error. The SPI uses successive RxBDs in the table
to continue reception until it runs out of Rx buffers or SPISEL is negated.
Transmission continues until no more data is available or SPISEL is negated. If it is negated
before all data is sent, it stops but the TxBD stays open. Transmission continues once
SPISEL is reasserted and SPICLK begins toggling. After the characters in the buffer are
sent, the SPI sends ones as long as SPISEL remains asserted.
31.3.3 The SPI in Multimaster Operation
The SPI can operate in a multimaster environment in which SPI devices are connected to
the same bus. In this conÞguration, the SPIMOSI, SPIMISO, and SPICLK signals of all
SPIs are shared; the SPISEL inputs are connected separately, as shown in Figure 31-3. Only
one SPI device can act as master at a timeÑall others must be slaves. When an SPI is
conÞgured as a master and its SPISEL input is asserted, a multimaster error occurs because
more than one SPI device is a bus master. The SPI sets SPIE[MME] in the SPI event register
and a maskable interrupt is issued to the core. It also disables SPI operation and the output
drivers of SPI signals. The core must clear SPMODE[EN] before the SPI is used again.
After correcting the problems, clear SPIE[MME] and reenable the SPI.
MOTOROLA Chapter 31. Serial Peripheral Interface 31-5