Motorola MPC860 PowerQUICC User Manual page 827

Chapter 31
Serial Peripheral Interface
310
310
The serial peripheral interface (SPI) allows the MPC860 to exchange data between other
MPC860 chips, the MC68360, the MC68302, the M68HC11 and M68HC05
microcontroller families, and peripheral devices such as EEPROMs, real-time clocks, A/D
converters, and ISDN devices.
The SPI is a full-duplex, synchronous, character-oriented channel that supports a four-wire
interface (receive, transmit, clock and slave select). The SPI block consists of transmitter
and receiver sections, an independent baud rate generator, and a control unit. The
transmitter and receiver sections use the same clock, which is derived from the SPI baud
rate generator in master mode and generated externally in slave mode. During an SPI
transfer, data is sent and received simultaneously.
Because the SPI receiver and transmitter are double-buffered, as shown in Figure 31-1, the
effective FIFO size (latency) is 2 characters. The SPIÕs msb is shifted out Þrst. When the
SPI is disabled in the SPI mode register (SPMODE[EN] = 0), it consumes little power.
IMB Peripheral Bus
SPI Mode Register Transmit_Register Receive_Register
Counter
Shift_Register
RxD IN_CLK TxD
Pins Interface SPIBRG BRGCLK
SPISEL SPIMOSI SPIMISO SPICLK
Figure 31-1. SPI Block Diagram
MOTOROLA Chapter 31. Serial Peripheral Interface 31-1