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CIVR, 35-10
CPM
TCNn , 18-10
TCRn , 18-10, 18-10, 18-11
TERn , 18-11
TGCR, 18-8, 18-8
TMRn , 18-9, 18-9
TRRn , 18-10, 18-10
DC_ADR, 8-13
DC_CST, 8-12
DC_DAT, 8-14
debug, 37-36
debug mode, 37-44
DER, 37-46
development port, 37-27
development port shift, 37-27
development support, 37-36
DPDR, 37-47
DSP
SDMR, 36-7
SDSR, 36-7
GSMR (AppleTalk), 25-3
HDLC mode
PSMR, 24-7
SCCE, 24-12
SCCM, 24-12
SCCS, 24-14
I2ADD, 32-7
I2BRG, 32-7
I2CER, 32-8
I2CMR, 32-8
I2COM, 32-8
I2MOD, 32-6
IC_ADR, 8-8, 8-8
IC_CST, 8-6, 8-9
IC_DAT, 8-8
ICR, 37-44
ICTRL, 37-39
IDMA
DCMR, 20-7, 20-19
IDMR1, 20-20
IDMRs, 20-9
IDSR1, 20-19
IDSRs, 20-8
SFCR/DFCR, 20-11
IDMA buffer descriptors, 20-9
IMMR, 11-4
instruction register, 38-6
key registers, 11-11
LCTRL1, 37-40
LCTRL2, 37-41
M_CASID, 9-23
M_TW, 9-24
M_TWB, 9-23
Index--10
INDEX
MPC860 PowerQUICC UserÕs Manual
MD_CAM, 9-28
MD_CTR, 9-17
MD_RAM, 9-29, 9-30
MD_RPN, 9-22
MD_TWC, 9-19
memory controller
BRn, 16-8
MAR, 16-17
MCR, 16-15
MDR, 16-16
MPTPR, 16-17
MSTAT, 16-13
MxMR, 16-13
ORn , 16-10
memory controller register model, 16-8
MI_CAM, 9-25
MI_CTR, 9-16
MI_RAM, 9-27
MI_RAM0, 9-26
MI_RPN, 9-20
MI_TWC, 9-18
MMU debug, 9-25
Mx_AP, 9-24
Mx_EPN, 9-18
PADAT, 34-4
PADIR, 34-4
PAODR, 34-3
PAPAR, 34-5
parallel interface port
PFCR, 33-4
PIPC, 33-7
PIPE, 33-9
PIPM, 33-10
port B, 33-10
PTPR, 33-10
SMASK, 33-4
PBDAT, 34-10
PBDIR, 34-10
PBODR, 34-9
PBPAR, 34-11
PCDAT, 34-15
PCDIR, 34-15
PCINT, 34-17
PCMCIA interface
PBRn , 17-12
PER, 17-10
PGCRB, 17-12
PGCRx, 17-12
PORn , 17-13
PSCR, 17-9
PCPAR, 34-15
PCSO, 34-16
PDDAT, 34-18
PDDIR, 34-19
MOTOROLA
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