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21.1 SI Features
The TSAÕs main features are as follows:
¥ Ability to connect the TDM channels independently. Each TDM can be one of the
following:
Ñ T1 or CEPT line
Ñ Pulse code modulation highway (PCM)
Ñ Integrated services digital network (ISDN) primary rate
Ñ ISDN basic rateÑusing an interchip digital link (IDL)
Ñ ISDN basic rateÑusing a general circuit interface (GCI)
Ñ User-deÞned interfaces
¥ Independent Tx and Rx routing paths programmed in the SI RAM
¥ Independent Tx and Rx frame syncs
¥ Independent Tx and Rx clocks
¥ Selection of rising/falling clock edges for the frame sync and data bits
´
¥ Supports 1
and 2
¥ Selectable delay (0Ð3 bits) between frame sync and frame start
¥ Four programmable strobe outputs and two (1x) clock output pins
¥ Bit or byte resolution in routing, masking, and strobe selection
¥ Supports frames up to 8,192 bits long
¥ Internal routing and strobe selection can be programmed dynamically.
¥ Supports automatic echo and loopback modes for each TDM channel
The NMSI is discussed in Section 21.3, ÒNMSI ConÞguration.Ó Its main features are as
follows:
¥ Each SCC and SMC can be programmed independently to work with its own set of
non-multiplexed signals
¥ Each SCC can have its own set of modem control signals
¥ Each SMC can have its own set of four signals
¥ Each SCC and SMC can derive clocks externally from a bank of eight clock signals
or a bank of four baud-rate generators
21.2 The Time-Slot Assigner (TSA)
The time-slot assigner (TSA) implements both internal route selection and time-division
multiplexing (TDM) for multiplexed serial channels. The TSA supports the serial bus rate
and format for most standard TDM buses, including the T1 and CEPT highways, pulse code
modulation (PCM) highway, and ISDN buses in both basic and primary rates. The two
MOTOROLA
´
input clocks (1 or 2 clocks per data bit)
Chapter 21. Serial Interface
Part V. The Communications Processor Module
21-3
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