Motorola MPC860 PowerQUICC User Manual page 1019

B.3.1 Performance of Serial Channels
The table provided in this section lists the data rates supported by the CPM for particular
channels in different modes. These Þgures assume that the serial channel in question is the
only channel in operation. Individual channels operating at the data rate quoted would
consume 100% of the CPM bandwidth.
The performance available from different serial channels in different protocols varies
greatly. This is due to the amount of overall processing required by the protocol and by the
split between hardware-assist provided in the serial channel and processing performed in
the CPM by microcode. For example:
¥ An SCC in UART mode provides more processing in the SCC hardware, whereas an
SMC in UART mode is more reliant on the CPM. Therefore, the performance of an
SCC in UART mode is greater.
¥ An SCC in HDLC mode performs most of the processing (e.g. bit manipulation,
deframing) in hardware, whereas HDLC processing for QMC channels falls on the
communications processor module (CPM). Thus, an SCC in HDLC mode can
process more data than an SCC in QMC mode, even if all QMC time slots are
concatenated into one logical channel.
Maximum data rates are given for most channels as full duplex. Channels operating in half
duplex will require only half the CPM service, and thus the maximum data rates supported
for these channels doubles.
Managing DMA for the serial channels is a signiÞcant portion of the CPM processing.
Therefore, because channels with larger frame sizes require the CPM to access the buffer
descriptors less often, these channels experience higher performance. An example of this
shown in the table below is an SCC in HDLC mode; a channel with a minimum frame size
of 64 bytes has better performance than one with a minimum frame size of 5 bytes.
The performance Þgures listed in Table B-1 are for a 25 MHz system clock only. In general,
performance scales linearly with frequency; an MPC860 with a 50 MHz system clock
would support twice the quoted data rate. Thus, a combination of serial channels and
protocols which are beyond the MPC860Õs performance scope at 25 MHz may be possible
at 40 MHz.
Performance Þgures quoted in Table B-1 assume worst-case conditions. Worst-case
conditions are a steady stream of minimum-size frames. Furthermore, for the SCC in QMC
mode, it assumes that all virtual channels simultaneously reach end-of-frame, and thus all
must close and open buffers simultaneously.
MOTOROLA Appendix B. Serial Communications Performance
Appendixes
B-3