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Part V. The Communications Processor Module
Table 30-20 describes SMC monitor channel RxBD Þelds.
Table 30-20. SMC Monitor Channel RxBD Field Descriptions
Bits Name
0
E
Empty.
0 The CP clears E when the byte associated with this BD is available to the core.
1 The core sets E when the byte associated with this BD has been read.
1
L
Last (EOM). Set when the EOM indication is received on the E bit. Note that when this bit is set, the
data byte is invalid.
2
ER
Error condition. Set when an error occurs on the monitor channel protocol. The error condition indicates
that a new byte was sent before the SMC acknowledged the previous byte.
3
MS
Data mismatch. Set when two different consecutive bytes are received; cleared when the last two
consecutive bytes match. The SMC waits for the reception of two identical consecutive bytes before
writing new data to the RxBD.
4Ð7
Ñ
Reserved, should be cleared.
8Ð15
Data Data Þeld. Contains the monitor channel data byte that the SMC received.
30.5.6 SMC GCI Monitor Channel TxBD
The CP uses the GCI monitor channel TxBD, shown in Figure 30-17, to report on the
monitor channel transmit byte. The TxBD itself contains the monitor data to be sent.
0
1
Offset + 0
R
L
AR
Figure 30-17. SMC GCI Monitor Channel TxBD
Table 30-21 describes SMC monitor channel TxBD Þelds.
Table 30-21. SMC Monitor Channel TxBD Field Descriptions
Bits Name
0
R
Ready.
0 Cleared by the CP after transmission. The TxBD is now available to the core.
1 Set by the core when the data byte associated with this BD is ready for transmission.
1
L
Last (EOM). When L = 1, the SMC Þrst transmits the buffer data and then transmits the EOM
indication on the E bit.
2
AR
Abort request. Set by the SMC when an abort request is received on the A bit. The transmitter sends
the EOM on the E bit after receiving an abort request.
3Ð7
Ñ
Reserved, should be cleared.
8Ð15 Data
Data Þeld. Contains the data to be sent by the SMC on the monitor channel.
30-34
2
3
4
5
6
Ñ
MPC860 PowerQUICC UserÕs Manual
Description
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Description
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Data
MOTOROLA
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