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Figure 38-5 shows the logic conÞguration for an output control boundary scan cell.
1 Ð Extest | Clamp
0 Ð Otherwise
Output Control
from System
Logic
Figure 38-5. Input/Output Control Boundary Scan Cell (I/O Control Cell)
Figure 38-6 shows the logic conÞguration of bidirectional signal boundary scan cells.
Output Enable
from System
Logic
Output Data
Input Data
Figure 38-6. Bidirectional (I/O) Signal Boundary Scan Cell
The value of the control bit controls the output function of the bidirectional signal. One or
more bidirectional data cells can be serially connected to a control cell. Bidirectional
signals include two scan cells for data (input and output buffers) and an I/O control block.
It is important to know the boundary scan bit order and the signals that are associated with
them. The bit order of the boundary scan chain (described in the MPC860 BSDL Þle) starts
with the TDO output and ends with the TDI input. The shift register cell nearest TDO (Þrst
to be shifted in) is deÞned as bit 1 and the last bit to be shifted in is bit 475.
MOTOROLA
Shift DR
G1
1
MUX
1
G1
1
MUX
1
From Last Cell
From Last Cell
I/O Control
O.PIN
I.OBS
To Next Cell
To Next Pin Pair
Chapter 38. IEEE 1149.1 Test Access Port
Part VI. Debug and Test
To Next Cell
D
C
Clock DR
Update DR
EN
To Output
Buffer
D
C
I/O
Pin
38-5
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