Motorola MPC860 PowerQUICC User Manual page 695

24.10 SCC HDLC Transmit Buffer Descriptor (TxBD)
The CPM uses the TxBD, shown in Figure 24-7, to conÞrm transmissions and indicate error
conditions.
0 1
Offset + 0 R Ñ
Offset + 2
Offset + 4
Offset + 6
Figure 24-7. SCC HDLC Transmit Buffer Descriptor (TxBD)
Table 24-8 describes HDLC TxBD status and control Þelds.
Table 24-8. SCC HDLC TxBD Status and Control Field Descriptions
Bits Name
0 R Ready.
0 The buffer is not ready for transmission. Both the buffer and the BD can be updated. The CPM
clears R after the buffer is sent or an error is encountered.
1 The buffer has not been sent or is being sent and the BD cannot be updated.
1 Ñ Reserved, should be cleared.
2 W Wrap (last BD in TxBD table).
0 Not the last BD in the table.
1 Last BD in the BD table. After this buffer is used, the CPM sends data using the BD pointed to by
TBASE. The number of TxBDs in this table is determined by TxBD[W] and the space constraints of
the dual-port RAM.
3 I Interrupt.
0 No interrupt is generated after this buffer is processed.
1 SCCE[TXB] or SCCE[TXE] is set when this buffer is processed, causing interrupts if not masked.
4 L Last.
0 Not the last buffer in the frame.
1 Last buffer in the frame.
5 TC Tx CRC. Valid only when TxBD[L] = 1. Otherwise, it is ignored.
0 Transmit the closing ßag after the last data byte. This setting can be used to send a bad CRC after
the data for testing purposes.
1 Transmit the CRC sequence after the last data byte.
6 CM Continuous mode.
0 Normal operation.
1 The CP does not clear TxBD[R] after this BD is closed allowing the buffer to be resent the next time
the CP accesses this BD. However, TxBD[R] is cleared if an error occurs during transmission,
regardless of CM.
7Ð13 Ñ Reserved, should be cleared.
14 UN Underrun. Set after the SCC sends a buffer and a transmitter underrun occurred.
15 CT CTS lost. Indicates when CTS in NMSI mode or layer 1 grant is lost in GCI or IDL mode during frame
transmission. If data from more than one buffer is currently in the FIFO when this error occurs, the
HDLC writes CT in the current BD after sending the buffer.
MOTOROLA
2 3 4 5
W I L TC CM
Chapter 24. SCC HDLC Mode
Part V. The Communications Processor Module
6 7 8 9 10
Ñ
Data Length
Tx Buffer Pointer
Description
11 12 13 14 15
UN CT
24-11