Motorola MPC860 PowerQUICC User Manual page 949

Intended Audience
Part VI is intended for system designers who need to test and debug their MPC860 design.
Contents
Part VI describes how to use the MPC860 facilities for debugging and system testing. It
contains the following chapters:
¥ Chapter 37, ÒSystem Development and Debugging,Ó describes support provided for
program ßow tracking, internal watchpoint and breakpoint generation, and
emulation systems control.
¥ Chapter 38, ÒIEEE 1149.1 Test Access Port,Ó describes the dedicated user-accessible
test access port (TAP), which is fully compatible with the IEEE 1149.1 Standard Test
Access Port and Boundary Scan Architecture.
Suggested Reading
This section lists additional reading that provides background for the information in this
manual as well as general information about the PowerPC architecture.
MPC8xx Documentation
Supporting documentation for the MPC860 can be accessed through the world-wide web
at http://www.motorola.com/SPS/RISC/netcomm. This documentation includes technical
speciÞcations, reference materials, and detailed applications notes.
MOTOROLA Part VI. Debug and Test
Debug and Test
Part VI
VI-i