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Part V. The Communications Processor Module
Bit
0
1
Field
Ñ
REA
Reset
R/W
Addr
Figure 23-4. Transmit Out-of-Sequence Register (TOSEQ)
Table 23-5 describes TOSEQ Þelds.
Bit
Name
0Ð1
Ñ
Reserved, should be cleared.
2
REA
Ready. Set when the character is ready for transmission. Remains 1 while the character is
being sent. The CP clears this bit after transmission.
3
I
Interrupt. If this bit is set, transmission completion is ßagged in the event register (SCCE[TX] is
set), triggering a maskable interrupt to the core.
4
CT
Clear-to-send lost. Operates only if the SCC monitors CTS (GSMR_L[DIAG]). The CP sets this
bit if CTS negates when the TOSEQ character is sent. If CTS negates and the TOSEQ
character is sent during a buffer transmission, the TxBD[CT] status bit is also set.
5Ð6
Ñ
Reserved, should be cleared.
7
A
Address. Setting this bit indicates an address character for multidrop mode.
8Ð15 CHARSEND Character send. Contains the character to be sent. Any 5- to 8-bit character value can be sent
in accordance with the UART conÞguration. The character should be placed in the lsbs of
CHARSEND. This value can be changed only while REA = 0.
23.12 Sending a Break (Transmitter)
A break is an all-zeros character with no stop bit that is sent by issuing a
command. The SCC Þnishes transmitting outstanding data, sends a programmable number
of break characters (determined by BRKCR), and reverts to idle or sends data if a
command is given before completion. When the break code is complete, the
TRANSMIT
transmitter sends at least one high bit before sending more data, to guarantee recognition
of a valid start bit. Because break characters do not preempt characters in the transmit FIFO,
they may not be sent for eight (SCC1) or four (SCC2ÐSCC4) character times. To reduce
this latency, set GSMR_H[TFL] to decrease the FIFO size to one character before enabling
the transmitter.
23.13 Sending a Preamble (Transmitter)
Sending a preamble sequence of consecutive ones ensures that a line is idle before sending
a message. If the preamble bit TxBD[P] is set, the SCC sends a preamble sequence (idle
character) before sending the buffer. For example, for 8 data bits, no parity, 1 stop bit, and
1 start bit, a preamble of 10 ones is sent before the Þrst character in the buffer.
23-10
2
3
4
5
6
I
CT
Ñ
0000_0000_0000_0000
Table 23-5. TOSEQ Field Descriptions
MPC860 PowerQUICC UserÕs Manual
7
8
9
10
A
R/W
SCC base + 0x4E
Description
11
12
13
14
CHARSEND
STOP TRANSMIT
RESTART
MOTOROLA
15
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