Motorola MPC860 PowerQUICC User Manual page 543

Restart gate mode is like normal gate mode, but also resets the counter on the falling edge
of TGATEx. The restart gate mode can be used for pulse interval measurement and bus
monitoring:
¥ Pulse measurementÑThe restart gate mode can measure a low pulse on TGATEx.
The rising edge of TGATEx completes the measurement. If TGATEx is externally
connected to TINx, it causes the timer to capture the count value and generate a
rising-edge interrupt.
¥ Bus monitoringÑThe restart gate mode can detect a signal that is abnormally stuck
low. The bus signal should be connected to TGATEx. The timer count is reset on the
falling edge of the bus signal and if the bus signal does not go high again within the
number of user-deÞned clocks, an interrupt can be generated.
The gate function is enabled in the TMR; the gate operating mode is selected in the TGCR.
Note that TGATEx is internally synchronized to the system clock. However, if TGATEx
meets the asynchronous input setup time, the counter begins counting after one system
clock when the input clock source (TMRx[ICLK]) is internal.
18.2.2.5 Cascaded Mode
Timer 1 can be internally cascaded to timer 2 and timer 3 can be internally cascaded to timer
4 to form 32-bit timers. The TGCR is used to put the timers into cascaded mode, as shown
in Figure 18-4.
Timer 1
TRR, TCR, TCN connected to D[0Ð15]
TRR, TCR, TCN connected to D[0Ð15]
Figure 18-4. Timer Cascaded Mode Block Diagram
If TGCR[CASx] is set, the two corresponding timers function as a 32-bit timer with a 32-bit
TRR, TCR, and TCN. In this case, the mode registers TMR1 and TMR3 are ignored and
TMR2 and TMR4 are used to deÞne the mode. Similarly, the capture is controlled by TIN2
or TIN4, and interrupts are generated by TER2 or TER4. In cascaded mode, the cascaded
TRR, TCR, and TCN should always be accessed with 32-bit bus cycles.
MOTOROLA Chapter 18. Communications Processor Module and CPM Timers
Capture
Timer 3
Capture
Part V. The Communications Processor Module
Timer 2
TRR, TCR, TCN connected to D[16Ð31]
Timer 4
TRR, TCR, TCN connected to D[16Ð31]
Clock
Clock
18-7