Table of Contents
Advertisement
external SRESET, 12-2, 12-4
internal HRESET, 12-2
internal SRESET, 12-4
JTAG reset, 12-3
power-on reset, 12-2
reset clock source configuration, 15-16
reset configuration, 12-6
SCC receiver reset sequence, 22-27
SCC transmitter reset sequence, 22-27
settings at power-on, 15-7
software watchdog reset, 12-3
Restart gate mode, 18-7
RETRY (retry) signal, 14-38
RFC1549 exceptions, 26-4
RFCR/TFCR (Rx/Tx buffers function code
registers), 22-16
RFCR/TFCR (SPI receive/transmit function code
register), 31-12
Rotate and shift instructions, D-18ÐD-19
RSR (reset status register), 12-5
RSTCONF (reset configuration) signal, 3-8, 13-10
RSV (reservation transfer) signal, 3-4, 13-6,
14-4, 14-30
RTC (real-time clock) register, 11-28
RTCAL (real-time clock alarm) register, 11-29
RTCSC (real-time clock status and control)
register, 11-27
RTER (RISC timer event register), 19-15
RTMR (RISC timer mask register), 19-15
RTSEC (real-time clock alarm seconds)
register, 11-29
S
SAMPLE/PRELOAD instruction, 38-6
SCC, 26-1, 26-1
SCC buffer descriptors, 22-11
SCC initialization, 22-17
SCC parameter RAM, 22-14
SCC1 memory map,, 2-6
SCC4 memory map,, 2-8
SCCE (SCC event register)
(asynchronous HDLC), 26-9
SCCE (SCC event register) (HDLC), 24-12
SCCE (SCC event) register
transparent mode, 29-12
SCCE (SCC event) register (BISYNC), 27-15
SCCE (SCC event) register (Ethernet), 28-25
SCCE (SCC UART event) register, 23-19
SCCM (SCC mask) (asynchronous HDLC), 26-9
SCCM (SCC mask) register
transparent mode, 29-12
SCCM (SCC mask) register (BISYNC), 27-15
SCCM (SCC mask) register (Ethernet), 28-25
SCCM (SCC mask) register (HDLC), 24-12
Index--12
INDEX
SCCM (SCC UART mask) register, 23-19
SCCR (system clock and reset control register), 15-27
SCCs
MPC860 PowerQUICC UserÕs Manual
AppleTalk mode
connecting to AppleTalk, 25-3
operating LocalTalk frame, 25-1
overview, 25-1
programming example, 25-4
programming in AppleTalk, 25-3
Asynchronous HDLC mode
frame reception processing, 26-2
asynchronous HDLC mode
channel implementation, 26-5
configuring GSMR/DSR, 26-6
decoding the receiver transparency, 26-3
differences with HDLC mode, 26-14
encoding the transmitter transparency, 26-3
error handling, 26-8
features, 26-1
frame reception processing, 26-2
frame transmission processing, 26-2
overview, 26-1
programming example, 26-14
programming the controller, 26-7
receive buffers, 26-11
receive commands, 26-8
transmit buffers, 26-13
transmit commands, 26-8
BISYNC mode
commands, 27-5
control character recognition, 27-6
error handling, 27-9
frame reception, 27-3
frame transmission, 27-2
overview, 27-1
programming the controller, 27-17
receive buffer, 27-12
sending/receiving synchronization
sequence, 27-9
transmit buffer, 27-13
controlling SCC timing, 22-18
DPLL operation, 22-22
Ethernet mode
address recognition, 28-16
collision handling, 28-18
commands, 28-14
connecting to Ethernet, 28-5
error handling, 28-19
frame reception, 28-7
hash table algorithm, 28-17
internal/external loopback, 28-18
learning Ethernet, 28-4
overview, 28-1
programming example, 28-27
MOTOROLA
Advertisement
Table of Contents
