Motorola MPC860 PowerQUICC User Manual page 368

Part IV. Hardware Interface
Bus Request (BR)
Receives Bus Grant (BG) from arbiter
Asserts Bus Busy (BB) if no other master is driving
Asserts Transfer Start (TS)
Drives address and attributes
Drives BURST asserted
Asserts Burst Data in Progress (BDIP)
Receives data
Receives data
Receives Data
Negates Burst Data in Progress (BDIP)
Receives data
Figure 14-11. Basic Flow of a Burst-Read Cycle
14-16
MASTER
MPC860 PowerQUICC UserÕs Manual
SLAVE
Receives address
Returns data
Asserts Transfer Acknowledge (TA)
No
BDIP asserted
?
Yes
Returns data
Asserts Transfer Acknowledge (TA)
No
BDIP asserted
?
Yes
Returns data
asserts Transfer Acknowledge (TA)
No
BDIP asserted
?
Yes
Returns data
asserts Transfer Acknowledge (TA)
No
BDIP asserted
?
Yes
DonÕt drive
data
DonÕt drive
data
DonÕt drive
data
DonÕt drive
data
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