Motorola MPC860 PowerQUICC User Manual page 772

Part V. The Communications Processor Module
0 1
Offset + 0 R PAD
Offset + 2
Offset + 4
Offset + 6
Table 28-8 describes TxBD status and control Þelds.
Table 28-8. SCC Ethernet Receive TxBD Status and Control Field Descriptions
Bits Name
0 R Ready.
0 The buffer is not ready for transmission. The user can update this BD or its data buffer. The CPM
clears R after the buffer has been sent or after an error occurs.
1 The user-prepared buffer has not been sent or is currently being sent. Do not modify this BD.
1 PAD Short frame padding. Valid only when L is set. Otherwise, it is ignored.
0 Do not add PADs to short frames.
1 Add PADs to short frames. Pad bytes are inserted until the length of the sent frame equals the
MINFLR and they are stored in PADs in the parameter RAM.
2 W Wrap (Þnal BD in table).
0 Not the last BD in the table.
1 Last BD in the table. After this buffer is used, the CPM receives incoming data into the Þrst BD that
TBASE points to in the table. The number of TxBDs in this table is determined only by the W bit and
overall space constraints of the dual-port RAM.
Note: The TxBD table must contain more than one BD in Ethernet mode.
3 I Interrupt.
0 No interrupt is generated after this buffer is serviced.
1 SCCE[TXB] or SCCE[TXE] is set after this buffer is serviced. These bits can cause interrupts if they
are enabled.
4 L Last.
0 Not the last buffer in the transmit frame.
1 Last buffer in the transmit frame.
5 TC Tx CRC. Valid only when L = 1. Otherwise, it is ignored.
0 End transmission immediately after the last data byte.
1 Transmit the CRC sequence after the last data byte.
6 DEF Defer indication. The frame was deferred before being sent successfully, that is, the transmitter had to
wait for carrier sense before sending because the line was busy. This is not a collision indication;
collisions are indicated in RC.
7 HB Heartbeat. Set when the collision input was not asserted within 20 transmit clocks after transmission.
HB cannot be set unless PSMR[HBC] = 1. The SCC writes HB after it Þnishes sending the buffer.
8 LC Late collision. Set when a collision occurred after the number of bytes deÞned for PSMR[LCW] are
sent. The Ethernet controller stops sending and writes this bit after it Þnishes sending the buffer.
9 RL Retransmission limit. Set when the transmitter fails (Retry Limit + 1) attempts to successfully transmit
a message because of repeated collisions on the medium. The Ethernet controller writes this bit after
it Þnishes attempting to send the buffer.
28-24
2 3 4 5 6
W I L TC DEF
Tx Data Buffer Pointer
Figure 28-10. SCC Ethernet TxBD
MPC860 PowerQUICC UserÕs Manual
7 8 9 10
HB LC RL
Data Length
Description
11 12 13 14 15
RC UN CSL
MOTOROLA