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MPC860
A complete tabulation of modules and power supplies is given in Table 15-6.
Block
I/O Pad
CLKOUT
Digital SPLL
Clock Control
Internal Logic
Clock Drivers
Analog SPLL
OSCM
SCCR, PLPRCR, and RSR
RTC, PIT, TB, and DEC
15.4.1 I/O Buffer Power (VDDH)
The I/O buffers, logic, and clock control are fed by a 3.3V power supply.
VDDH must in all cases be greater than or equal to VDDL.
MOTOROLA
I / O Pad
Internal Logic
and clock drivers
Analog
SPLL
VDDSYN
VDDL
MPC860
Figure 15-12.
MPC860
Table 15-6.
VDDH
X
X
X
X
Chapter 15. Clocks and Power Control
OSCM,
PIT, RTC, TB,
DEC, SCCR,
PLPRCR,
and RSR
Clock Control
and digital SPLL
Power Rails
Modules vs. Power Rails
VDDL
VDDSYN
X
X
Part IV. Hardware Interface
TEXP
KAPWR
VDDH
KAPWR
X
X
X
X
X
15-17
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