Motorola MPC860 PowerQUICC User Manual page 471

Table 16-18 shows how AMx can be deÞned to interface with a range of DRAM modules.
Table 16-18. AMA/AMB Definition for DRAM Interface
Data Bus
Memory Size
Width
8 bits 64 Kbyte
128 Kbyte
256 Kbyte
512 Kbyte
1 Mbyte
2 Mbyte
4 Mbyte
256 Kbyte
512 Kbyte
1 Mbyte
2 Mbyte
4 Mbyte
8 Mbyte
16 Mbyte
8 bits 1 Mbyte
2 Mbyte
4 Mbyte
8 Mbyte
16 Mbyte
32 Mbyte
64 Mbyte
4 Mbyte
8 Mbyte
16 Mbyte
32 Mbyte
64 Mbyte
16 Mbyte
32 Mbyte
64 Mbyte
128 Mbyte
256 Mbyte
64 Mbyte
128 Mbyte
256 Mbyte
MOTOROLA
DRAM Address Pin Number
Row Column
8 8
9
10
11
12
13
14
9 9
10
11
12
13
14
15
10 10
11
12
13
14
15
16
11 11
12
13
14
15
12 12
13
14
15
16
13 13
14
15
Chapter 16. Memory Controller
Part IV. Hardware Interface
MPC860 Address
Pin Connection
A24ÐA31
A23ÐA31
A22ÐA31
A21ÐA31
A20ÐA31
A19ÐA31
A18ÐA31
A23ÐA31
A22ÐA31
A21ÐA31
A20ÐA31
A19ÐA31
A18ÐA31
A17ÐA31
A22ÐA31
A21ÐA31
A20ÐA31
A19ÐA31
A18ÐA31
A17ÐA31
A16ÐA31
A21ÐA31
A20ÐA31
A19ÐA31
A18ÐA31
A17ÐA31
A20ÐA31
A19ÐA31
A18ÐA31
A17ÐA31
A16ÐA31
A19ÐA31
A18ÐA31
A17ÐA31
AMx
000
001
010
011
100
101
16-45