Motorola MPC860 PowerQUICC User Manual page 727

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4. Program SICR. Route the BRG clocking to the SCC and select whether the channel
is using the TSA or the NMSI.
5. Point RBASE and TBASE in the SCC parameter RAM to the Þrst RxBD and TxBD.
6. Issue the
INIT RX AND TX PARAMETERS
7. Program RFCR and TFCR.
8. Write MRBLR with the maximum Rx buffer size.
9. Write C_MASK and C_PRES with the standard values.
10. Clear the Zero register.
11. Program RFTHR to the number of frames to be received before generating an
interrupt.
12. Program the control character tables, TXCTL_TBL and RXCTL_TBL.
13. Initialize all RxBDs.
14. Initialize all TxBDs.
15. Clear SCCE by writing 0xFFFF to it.
16. Program SCCM to enable all preferred interrupts.
17. Program GSMR_H.
18. Program GSMR_L to asynchronous HDLC mode, but do not turn on the transmitter
or receiver.
19. Set the PSMR appropriately. See Section 26.13.3, ÒAsynchronous HDLC Mode
Register (PSMR).Ó
20. Enable the transmitter and receiver in GSMR_L.
26.18 IrDA Encoder/Decoder (SCC2 Only)
The IrDA (Infrared Data Association) data link protocol can be run on any SCC. However,
SCC2 includes additional hardware to support the encoding/decoding required by the IrDA
physical layer.
IrDA deÞnes a family of speciÞcations for interconnecting computers and peripherals using
a directed half-duplex serial infrared communications medium. The IrDA data link layer
protocol is based on a preexisting standard asynchronous HDLC protocol. Figure 26-9
shows a serial infrared (SIR) link.
MOTOROLA
Chapter 26. SCC Asynchronous HDLC Mode and IrDA
Part V. The Communications Processor Module
command for the SCC.
26-15

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