Motorola MPC860 PowerQUICC User Manual page 931

S Ñ W
Offset + 0 S 0 W
Offset + 2
Figure 36-19. FIR5 Fractionally Spaced Equalizer Example
36.11.5 FIR6ÐComplex C, Real X, and Complex Y
Using the values provided in the parameter packet, the FIR6 implements a basic FIR Þlter,
shown in Figure 36-20, with complex coefÞcients, real input samples, and complex output.
The input data is in a circular buffer with size (M+1) and the output data is in a circular
buffer with size (N+1).
X(n)
{Real}
36.11.5.1 FIR6 CoefÞcient, Input, and Output Buffers
The coefÞcient vector occupies K pairs of 16-bit entries (real and imaginary components)
in memory and C(0) is stored in the Þrst location. The input sample buffer is a circular
buffer containing (M+1) bytes and each sample is a 16-bit entry. The next sample is stored
in the address that follows the previous sample. The output buffer is a circular buffer that
contains (N+1) bytes and the next output is stored in the address that follows the previous
output. See Table 36-15.
MOTOROLA
I X IALL INDEX
I 1 0 11
I=1 (One Iteration)
C(0)
{Complex}
å
T
C(1)
T
C(2)
T
C(kÐ1)
Figure 36-20. FIR6 Function
Chapter 36. Digital Signal Processing
Part V. The Communications Processor Module
PC Ñ Ñ
0 0 0
Y(n)
{Complex}
k 1 Ð
å
Y n ( ) C p ( )X n p
=
p = 0
OPCODE
00101
( )
Ð
36-17