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PDPAR, 34-19
PowerPC
accessing SPRs, 5-11
DEC, 11-23
not supported, 5-6
overview, 5-1
PISCR, 11-31
PITC, 11-32
PITR, 11-33
RTC, 11-28
RTCAL, 11-29
RTCSC, 11-27
RTSEC, 11-29
supervisor-level
MSR, 5-6
PVR, 5-8
summary, 5-4, 5-8, C-2
TBREFU/TBREFL, 11-25
TBSCR, 11-26
TBU/TBL, 11-24
user-level
CR, 5-2
summary, 5-2, C-1
TBU/TBL, 5-4
XER, 5-3
PSMR, 25-4
PSMR (BISYNC), 27-10
PSMR (Ethernet), 28-19
PSMR (transparent mode), 29-8
quick reference guide, C-1
register lock (KAPWR powered), 11-11, 15-26
RFCR/TFCR (SPI), 31-12
RSR, 12-5
RTMR, 19-15
SCC mode
DSR, 22-10
GSMR, 22-3
PSMR, 22-10
RFCR/TFCR, 22-16
TODR, 22-10
SCCE (transparent mode), 29-12
SCCE (BISYNC), 27-15
SCCE (Ethernet), 28-25
SCCM (transparent mode), 29-12
SCCM (UART mode), 23-19,
SCCM (BISYNC), 27-15
SCCM (Ethernet), 28-25
SCCS, 27-16, 29-13
SDMA
SDAR, 20-5
SDCR, 20-3
SDMR, 20-5
SDSR, 20-4
serial interface
BRGCn, 21-40
MOTOROLA
INDEX
SICMR, 21-24
SICR, 21-23
SIGMR, 21-16
SIMODE, 21-17
SIRP, 21-26
SISTR, 21-25
settings after:
alignment exception, 7-8
debug exception, 7-15
decrementer exception, 7-10
DTLB error exception, 7-14
DTLB miss exception, 7-13
external interrupt, 7-7
ITLB error exception, 7-14
ITLB miss exception, 7-13
program exception, 7-9
software emulation exception, 7-12
system call exception, 7-11
trace exception, 7-11
SI registers, 21-16
SIU
SIEL, 11-18
SIMASK, 11-17
SIUMCR, 11-5
SIVEC, 11-19
SYPCR, 11-9
TESR, 11-10
SMCE (SMC), 30-18
SMCE (GCI mode), 30-36
SMCE (transparent), 30-29
SMCM (SMC), 30-18
SMCM (GCI mode), 30-36
SMCM (transparent), 30-29
SMCMRs, 30-3
software watchdog timer
SWSR, 11-22
SPCOM, 31-10
SPIE, 31-10
SPIM, 31-10
SPMODE, 31-7
TECR, 37-27
TODR (AppleTalk), 25-4
UART mode
DSR, 23-11
PSMR, 23-13
SCCE, 23-19
SCCS, 23-21
TOSEQ, 23-9
reservation, 8-28
Reservation, storage, 14-34
Reset
cache initialization, 8-29
checkstop reset, 12-3
debug port hard/soft reset, 12-3
external HRESET, 12-2
Index
Index--11
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