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Appendixes
Name
0
5
dcbf
31
1
dcbi
31
dcbst
31
dcbt
31
dcbtst
31
dcbz
31
icbi
31
Table D-28. Segment Register Manipulation Instructions
Name
0
5
1
mfsr
31
1
mfsrin
31
1
mtsr
31
1
mtsrin
31
Table D-29. Lookaside Buffer Management Instructions
Name
0
5
1,4,5
slbia
31
1,4,5
slbie
31
1,5
tlbia
31
1,5
tlbie
31
1,5
tlbsync
31
Name
0
5
eciwx
31
ecowx
31
1
Supervisor-level instruction
2
Supervisor- and user-level instruction
3
Load and store string or multiple instruction
4
64-bit instruction
5
Optional in the PowerPC architecture
6
Floating-point instructions are not supported by the MPC860.
D-26
Table D-27. Cache Management Instructions
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
0 0 0 0 0
A
0 0 0 0 0
A
0 0 0 0 0
A
0 0 0 0 0
A
0 0 0 0 0
A
0 0 0 0 0
A
0 0 0 0 0
A
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
D
0
SR
D
0 0 0 0 0
S
0
SR
S
0 0 0 0 0
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
Table D-30. External Control Instructions
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
D
A
S
A
MPC860 PowerQUICC UserÕs Manual
B
B
B
B
B
B
B
0 0 0 0 0
B
0 0 0 0 0
B
0 0 0 0 0
B
0 0 0 0 0
B
0 0 0 0 0
B
B
86
0
470
0
54
0
278
0
246
0
1014
0
982
0
595
0
659
0
210
0
242
0
498
0
434
0
370
0
306
0
566
0
310
0
438
0
MOTOROLA
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