Motorola MPC860 PowerQUICC User Manual page 828

Part V. The Communications Processor Module
31.1 Features
The following is a list of the SPIÕs main features:
¥ Four-signal interface (SPIMOSI, SPIMISO, SPICLK, and SPISEL)
¥ Full-duplex operation
¥ Works with data characters from 4 to 16 bits long
¥ Supports back-to-back character transmission and reception
¥ Master or slave SPI modes supported
¥ Multimaster environment support
¥ Continuous transfer mode for autoscanning of a peripheral
¥ Supports maximum clock rates of 6.25 MHz in master mode and 12.5 MHz in slave
mode, assuming a 25-MHz system clock
¥ Independent programmable baud rate generator
¥ Programmable clock phase and polarity
¥ Open-drain outputs support multimaster conÞguration
¥ Local loopback capability for testing
31.2 SPI Clocking and Signal Functions
The SPI can be conÞgured as a slave or as a master in single- or multiple-master
environments. The master SPI generates the transfer clock SPICLK using the SPI baud rate
generator (BRG). The SPI BRG takes its input from BRGCLK, which is generated in the
MPC860 clock synthesizer.
SPICLK is a gated clock, active only during data transfers. Therefore, SPI clock rates can
be very high, up to BRGCLK/4 in master mode or BRGCLK/2 in slave mode. Note,
however, that this high clock rate can be supported only over the period of a single
character, if messages consist of multiple back-to-back characters, operation becomes
limited by CPM performance, and thus the clock rate should be adjusted down accordingly.
CPM bandwidth required by the SPI channel should be calculated as the maximum rate that
back-to-back characters must be transmitted and received. Four combinations of SPICLK
phase and polarity can be conÞgured with SPMODE[CI, CP]. SPI signals can also be
conÞgured as open-drain to support a multimaster conÞguration in which a shared SPI
signal is driven by the MPC860 or an external SPI device.
The SPI master-in slave-out SPIMISO signal acts as an input for master devices and as an
output for slave devices. Conversely, the master-out slave-in SPIMOSI signal is an output
for master devices and an input for slave devices. The dual functionality of these signals
allows the SPIs in a multimaster environment to communicate with one another using a
common hardware conÞguration.
31-2 MPC860 PowerQUICC UserÕs Manual MOTOROLA