Table of Contents
Advertisement
Part III. Configuration
11.10.3 Real-Time Clock Alarm Register (RTCAL)
The real-time clock alarm register (RTCAL) is an alarm reference register. When RTC
increments to the value stored in this register, an alarm interrupt is generated. Note that
RTCAL is a keyed register. It must be unlocked in RTCALK before it can be written.
Bit
0
1
Field
Reset
R/W
Addr
Bit
16
17
18
Field
Reset
R/W
Addr
Figure 11-26. Real-Time Clock Alarm Register (RTCAL)
Table 11-22 describes RTCAL Þelds.
Bits
Name
0Ð31 ALARM Alarm reference counter. Indicates that an alarm interrupt will be generated this Þeld matches
corresponding RTC bits. The alarm has a 1-second resolution.
11.10.4 Real-Time Clock Alarm Seconds Register (RTSEC)
RTSEC, shown in Figure 11-27, is an up-counter that increments once per PITRTCLK tick.
Note that RTSEC is a keyed register. It must be unlocked in RTSECK before it can be
written.
Under normal conditions (RTCSC[38K] = 0), PITRTCLK is assumed to be 8192 Hz (4.192
MHz/512 or 32.768 KHz/4). RTSEC resets at 8192 and increments RTC. Thus, RTC
contains the time in seconds and RTSEC functions as a divider. For a 38.4-KHz crystal
(instead of 32.768 KHz), RTCSC[38K] should be set to make RTSEC reset at 9600 instead
of 8192.
11-29
2
3
4
5
6
(IMMR & 0xFFFF0000) + 0x22C
19
20
21
22
(IMMR & 0xFFFF0000) + 0x22E
Table 11-22. RTCAL Field Descriptions
MPC860 PowerQUICC UserÕs Manual
7
8
9
10
11
ALARM
Ñ
R/W
23
24
25
26
27
ALARM
Ñ
R/W
Description
12
13
14
15
28
29
30
31
MOTOROLA
Advertisement
Table of Contents
