Motorola MPC860 PowerQUICC User Manual page 950

Part VI. Debug and Test
Conventions
This document uses the following notational conventions:
Bold
mnemonics
italics
0x0
0b0
REG[FIELD]
x
n
Acronyms and Abbreviations
Table i contains acronyms and abbreviations used in this document. Note that the meanings
for some acronyms (such as SDR1 and DSISR) are historical, and the words for which an
acronym stands may not be intuitively obvious.
Term
BIST Built-in self test
CPM Communication processor module
IEEE Institute of Electrical and Electronics Engineers
JTAG Joint Test Action Group
LSB Least-signiÞcant byte
lsb Least-signiÞcant bit
LSU Load/store unit
MSB Most-signiÞcant byte
msb Most-signiÞcant bit
Rx Receive
SPR Special-purpose register
TAP Test access port
Tx Transmit
VI-ii
Bold entries in Þgures and tables showing registers and parameter
RAM should be initialized by the user.
Instruction mnemonics are shown in lowercase bold.
Italics indicate variable command parameters, for example, bcctrx.
Book titles in text are set in italics.
PreÞx to denote hexadecimal number
PreÞx to denote binary number
Abbreviations or acronyms for registers or buffer descriptors are
shown in uppercase text. SpeciÞc bits, Þelds, or numerical ranges
appear in brackets. For example, MSR[LE] refers to the little-endian
mode enable bit in the machine state register.
In certain contexts, such as in a signal encoding or a bit Þeld,
indicates a donÕt care.
Indicates an undeÞned numerical value
Table xi. Acronyms and Abbreviated Terms
MPC860 PowerQUICC UserÕs Manual
Meaning
MOTOROLA