Motorola MPC860 PowerQUICC User Manual page 887

Bit 0 1 2
Field DR0 DR1 DR2 DR3 DR4 DR5 DR6 DR7 DR8 DR9 DR10 DR11 DR12 DR13 DR14 DR15
Reset 0 0 0
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Addr
Figure 34-3. Port A Data Direction Register (PADIR)
Table 34-4 describes PADIR bits.
Bits Name
0Ð15 DRn Port A data direction. ConÞgures port A signals as inputs or outputs when functioning as
general-purpose I/O; otherwise, used to select the peripheral function.
0 Select the signal for general-purpose input, or select peripheral function 0.
1 Select the signal for general-purpose output, or select peripheral function 1.
34.2.1.4 Port A Pin Assignment Register (PAPAR)
The port A pin assignment register (PAPAR) conÞgures signals as general-purpose I/O or
dedicated for use with a peripheral.
Bit 0 1 2
Field DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8 DD9 DD10 DD11 DD12 DD13 DD14 DD15
Reset 0 0 0
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Addr
Figure 34-4. Port A Pin Assignment Register (PAPAR)
Table 34-5 describes PAPAR bits.
Bits Name
0Ð15 DDn ConÞgures a signal for general-purpose I/O or for dedicated peripheral function
0 General-purpose I/O. The peripheral functions of the signal are not used.
1 Dedicated peripheral function. The signal is used by the internal module. The on-chip peripheral
function to which it is dedicated can be determined by other bits.
MOTOROLA
3 4 5 6 7
0 0 0 0 0
Table 34-4. PADIR Bit Descriptions
3 4 5 6 7
0 0 0 0 0
Table 34-5. PAPAR Bit Descriptions
Chapter 34. Parallel I/O Ports
Part V. The Communications Processor Module
8 9 10 11
0 0 0 0
R/W R/W
0x950
Description
8 9 10 11
0 0 0 0
R/W R/W
0x952
Description
12 13 14 15
0 0 0 0
R/W R/W R/W R/W
12 13 14 15
0 0 0 0
R/W R/W R/W R/W
34-5