Motorola MPC860 PowerQUICC User Manual page 787

0 1
Offset + 0 R Ñ
Offset + 2
Offset + 4
Offset + 6
Figure 29-3. SCC Transparent Transmit Buffer Descriptor (TxBD)
Table 29-8 describes SCC Transparent TxBD status and control Þelds.
Table 29-8. SCC Transparent Tx BD Status and Control Field Descriptions
Bit Name
0 R Ready.
0 The buffer is not ready for transmission. The BD and buffer can be updated. The CPM clears R after
the buffer is sent or after an error is encountered.
1 The user-prepared buffer is not sent yet or is being sent. This BD cannot be updated while R = 1.
1 Ñ Reserved, should be cleared.
2 W Wrap (Þnal BD in table).
0 Not the last BD in the table.
1 Last BD in the table. After this buffer is used, the CPM receives incoming data into the Þrst BD that
TBASE points to. The number of TxBDs in this table is determined only by TxBD[W] and overall
space constraints of the dual-port RAM.
3 I Interrupt. Note that clearing this bit does not disable SCCE[TXE].
0 No interrupt is generated after this buffer is serviced.
1 When the CPM services this buffer, SCCE[TXB] or SCCE[TXE] is set. These bits can cause
interrupts if they are enabled.
4 L Last in message.
0 The last byte in the buffer is not the last byte in the transmitted transparent frame. Data from the
next transmit buffer is sent immediately after the last byte of this buffer.
1 The last byte in the buffer is the last byte in the transmitted transparent frame. After this buffer is
sent, the transmitter requires synchronization before the next buffer is sent.
5 TC Transmit CRC.
0 No CRC sequence is sent after this buffer.
1 A frame check sequence deÞned by GSMR_H[TCRC] is sent after the last byte of this buffer.
6 CM Continuous mode.
0 Normal operation.
1 The CPM does not clear TxBD[R] after this BD is closed, so the buffer is automatically resent when
the CPM accesses this BD next. However, TxBD[R] is cleared if an error occurs during
transmission, regardless of how CM is set.
7Ð13 Ñ Reserved, should be cleared.
14 UN Underrun. Set when the SCC encounters a transmitter underrun condition while sending the buffer.
15 CT CTS lost. Indicates the CTS was lost during frame transmission.
Data length and buffer pointer Þelds are described in Section 22.2, ÒSCC Buffer
Descriptors (BDs).Ó The buffer pointer can be even or odd and can reside in internal or
external memory.
MOTOROLA
2 3 4 5
W I L TC CM
Chapter 29. SCC Transparent Mode
Part V. The Communications Processor Module
6 7 8 9 10
Ñ
Data Length
Tx Buffer Pointer
Description
11 12 13 14 15
UN CT
29-11