Motorola MPC860 PowerQUICC User Manual page 335

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Name
Reset
WE0
High
BS_B0
IORD
WE1
High
BS_B1
IOWR
WE2
High
BS_B2
PCOE
WE3
High
BS_B3
PCWE
BS_A[0Ð3]
High
MOTOROLA
Table 13-1. Signal Descriptions (Continued)
Number
Type
C7
Output
A6
Output
B6
Output
A5
Output
D8, C8, A7,
Output
B8
Chapter 13. External Signals
Description
Write Enable 0ÑOutput asserted when a write access to an
external slave controlled by the GPCM is initiated by the
MPC860. WE0 is asserted if D[0Ð7] contains valid data to be
stored by the slave device.
Byte Select 0 on UPMBÑOutput asserted under control of the
UPMB, as programmed by the user. In a read or write transfer,
the line is only asserted if D[0Ð7] contains valid data.
IO Device ReadÑOutput asserted when the MPC860 starts a
read access to a region controlled by the PCMCIA interface.
Asserted only for accesses to a PC card I/O space.
Write Enable 1ÑOutput asserted when the MPC860 initiates a
write access to an external slave controlled by the GPCM.
WE1 is asserted if D[8Ð15] contains valid data to be stored by
the slave device.
Byte Select 1 on UPMBÑOutput asserted under control of the
UPMB, as programmed by the user. In a read or write transfer,
the line is only asserted if D[8Ð15] contains valid data.
I/O Device WriteÑThis output is asserted when the MPC860
initiates a write access to a region controlled by the PCMCIA
interface. IOWR is asserted only if the access is to a PC card
I/O space.
Write Enable 2ÑOutput asserted when the MPC860 starts a
write access to an external slave controlled by the GPCM.
WE2 is asserted if D[16Ð23] contains valid data to be stored
by the slave device.
Byte Select 2 on UPMBÑOutput asserted under control of the
UPMB, as programmed by the user. In a read or write transfer,
BS_B2 is asserted only D[16Ð23] contains valid data.
PCMCIA Output EnableÑOutput asserted when the MPC860
initiates a read access to a memory region under the control of
the PCMCIA interface.
Write Enable 3ÑOutput asserted when the MPC860 initiates a
write access to an external slave controlled by the GPCM.
WE3 is asserted if D[24Ð31] contains valid data to be stored
by the slave device.
Byte Select 3 on UPMBÑOutput asserted under control of the
UPMB, as programmed by the user. In a read or write transfer,
BS_B3 is asserted only if D[24Ð31] contains valid data.
PCMCIA Write EnableÑOutput asserted when the MPC860
initiates a write access to a memory region under control of
the PCMCIA interface.
Byte Select 0 to 3 on UPMAÑOutputs asserted under
requirement of the UPMB, as programmed by the user. For
read or writes, asserted only if their corresponding data lanes
contain valid data:
BS_A0 for D[0Ð7], BS_A1 for D[8Ð15],
BS_A2 for D[16Ð23], BS_A3 for D[24Ð31]
Part IV. Hardware Interface
13-9

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