Motorola MPC860 PowerQUICC User Manual page 756

Part V. The Communications Processor Module
When the receiver detects the Þrst bytes of the frame, the Ethernet controller performs
address recognition on the frame. The receiver can receive physical (individual), group
(multicast), and broadcast addresses. Ethernet receive frame data is not written to memory
until the internal address recognition process completes, which improves bus usage with
frames not addressed to this station. The receiver also operates with an external CAM. With
an external CAM, frame reception continues normally, unless the CAM speciÞcally signals
the frame to be rejected. See Section 28.7, ÒThe Content-Addressable Memory (CAM)
Interface.Ó
If a match is found, the Ethernet controller fetches the next RxBD and, if it is empty, starts
transferring the incoming frame to the RxBD associated data buffer. If a collision is
detected during the frame, the RxBDs associated with this frame are reused. Thus, there
will be no collision frames presented to you except late collisions, which indicate serious
LAN problems. When the data buffer has been Þlled, the Ethernet controller clears the E
bit in the RxBD and generates an interrupt if the I bit is set. If the incoming frame exceeds
the length of the data buffer, the Ethernet controller fetches the next RxBD in the table and,
if it is empty, continues transferring the rest of the frame to this buffer. The RxBD length is
determined by MRBLR in the SCC general-purpose parameter RAM, which should be at
least 64 bytes.
During reception, the Ethernet controller checks for a frame that is either too short or too
long. When the frame ends, the receive CRC Þeld is checked and written to the buffer. The
data length written to the last BD in the Ethernet frame is the length of the entire frame and
it enables the software to correctly recognize the frame-too-long condition.
When the receive frame is complete, the Ethernet controller can sample one byte from the
port B parallel I/O and append this byte to the end of the last RxBD in the frame. For any
PB[16Ð23] pins deÞned as outputs, the contents of the PBDAT latch is read instead of the
pin. This capability is useful for CAM applications and can be used when the external CAM
is not present. Sampling occurs at the end of frame reception.
The Ethernet controller then sets the L bit in the RxBD, writes the other frame status bits
into the RxBD, and clears the E bit. Then it generates a maskable interrupt, which indicates
that a frame has been received and is in memory. The Ethernet controller then waits for a
new frame. It receives serial data least-signiÞcant bit Þrst.
28.7 The Content-Addressable Memory (CAM)
Interface
The Ethernet controller can connect to an external CAM through the serial interface or a
system bus interface. Both interfaces can be used at the same time because there is no mode
bit to select them, but they are described separately here for clarity. To implement an option,
enable the pins needed for the implementation. Both interfaces use an MPC860 REJECT
28-8 MPC860 PowerQUICC UserÕs Manual MOTOROLA