Motorola MPC860 PowerQUICC User Manual page 875

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33.7 Handshaking I/O Modes
In either handshaking I/O mode, interlocked or pulsed, the PIP can be conÞgured as a
transmitter or receiver and either the CP or the core can control communications. For CP
control, BD and parameter RAM initialization is required; data is stored in the buffers using
the SDMA channels dedicated to SMC2. For core control, software interrupt routines read
and write to the PIP data register (PBDAT).
When the PIP transmits, STBO (PB15) is the STB handshake control signal and STBI
(PB14) is the ACK input. When the PIP receives, it generates ACK on STBO in response
to STB on STBI. Note that the PIP controller overrides bits 15 and 14 in the port B data
direction register (PBDIR) and PBDAT corresponding to STBO and STBI. (The open-drain
register PBODR does not apply to PB15 and PB14.)
The following subsections describe interlocked and pulsed handshake modes.
33.7.1 Interlocked Handshake Mode
The interlocked handshake mode provides a fast connection between MPC860s and can be
used for P1284-protocol advanced byte mode transfers. To connect MPC860s using this
interface, connect STBO from one 860 to the STBI of the other and connect the appropriate
data signals (either PB[23Ð16] or PB[31Ð16]).
When the PIP is transmitting, the CP loads data into the output latch when it receives a
request from the core to begin transfers. Once data is loaded, STB is asserted after a
programmable setup time. When ACK is sampled as low, data is sent, and STB is negated.
STB remains negated until new data is loaded into the output latch and ACK is negated.
When the PIP is receiving, input data is latched when STB is sampled as low. ACK is
asserted and then negated after the data is removed from the input latch. Figure 33-11
shows the handshake timing of the interlocked mode.
Transmitter
Data
Transmitter
STB
(Output Ready)
Receiver
ACK
(Input Ready)
Figure 33-11. Interlocked Handshake Mode Timing
MOTOROLA
Part V. The Communications Processor Module
T Setup
Chapter 33. Parallel Interface Port
T Hold
33-15

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