Motorola MPC860 PowerQUICC User Manual page 413

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software-initiation (through the MSR[POW]), CPM activity, internal interrupt sources,
external interrupt sources, and resets. These events are enabled in the SCCR[PRQEN].
The characteristics of each low-power mode are summarized in Table 15-7. Table 15-7 also
provides equations for approximate power consumption equations for each of these modes.
Operation
GCLKx
SPLL
Mode
Frequency
Normal high
Active
VCOOUT
¸2
DFNH
LPM=00
Normal low
Active
VCOOUT
¸2
DFNL+1
LPM=00
Doze high
Active
VCOOUT
DFNH
¸2
LPM=01
Doze low
Active
VCOOUT
DFNL+1
¸2
LPM=01
Sleep
Active
Inactive
LPM=10
Deep-sleep
Inactive Inactive
LPM=11
TEXPS=1
Power-down
Inactive Inactive
LPM=11
TEXPS=0
MOTOROLA
MPC860
Table 15-7.
Return Time from
Wake-Up
Wake-Up Event to
Method
Normal High
Ñ
Ñ
Software-Ini
Asynchronous
tiation, or
exceptions:
3-4 VCOOUT
Internal or
External
Clocks
Interrupt
Synchronous
Internal or
exceptions
External
3-4 GCLK2 Clocks
Interrupt
Internal or
External
Interrupt
Interrupt
3-4 VCOOUT
from RTC,
Clocks
PIT, DEC,
TB, IRQx
Interrupt
<500 OSCM Clocks
from RTC,
16ms-32 KHz
PIT, DEC,
TB, IRQx
Interrupt
<500 OSCM clocks
from RTC,
+ power supply
PIT, DEC,
wake-up
TB followed
(PwSp_Wake+ 16
by external
ms at 32 KHz)
hard reset
Chapter 15. Clocks and Power Control
Part IV. Hardware Interface
Low-Power Modes
Typical
MPC860 Power
Consumption
at 50 MHz
@20 mW + 1/2
DFNH
@20 mW + 1/2
(DFNL+1)
@20mW + 0.4/2
@20 mW + 0.4/2
<10 mW
TBD
32 KHz ~10mA,
KAPWR = 3.0V
Temperature = 50° C
Functionality
W
Full
W
DFNH
W
Enabled: SIU
timers, CPM, and
memory
controller
(DFNL+1)
W
Disabled: core,
MMU, caches
Enabled: RTC,
periodic interrupt
timer, timebase,
and decrementer
15-19

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