Motorola MPC860 PowerQUICC User Manual page 1078

Exception handler. A software routine that executes when an exception is
Extended opcode. A secondary opcode Þeld generally located in instruction
Execution synchronization. A mechanism by which all instructions in
Exponent. In the binary representation of a ßoating-point number, the
Fetch. Retrieving instructions from either the cache or main memory and
F
Fully-associative. Addressing scheme where every cache location (every
G
General-purpose register (GPR). Any of the 32 registers in the
Harvard architecture. An architectural model featuring separate caches for
H
H I
IEEE 754. A standard written by the Institute of Electrical and Electronics
Glossary--4
taken. Normally, the exception handler corrects the condition that
caused the exception, or performs some other meaningful task (that
may include aborting the program that caused the exception). The
address for each exception handler is identiÞed by an exception
vector offset deÞned by the architecture and a preÞx selected via the
MSR.
bits 21Ð30, that further deÞnes the instruction type. All PowerPC
instructions are one word in length. The most signiÞcant 6 bits of the
instruction are the primary opcode, identifying the type of
instruction. See also Primary opcode.
execution are architecturally complete before beginning execution
(appearing to begin execution) of the next instruction. Similar to
context synchronization but doesn't force the contents of the
instruction buffers to be deleted and refetched.
exponent is the component that normally signiÞes the integer power
to which the value two is raised in determining the value of the
represented number. See also Biased exponent.
placing them into the instruction queue.
byte) can have any possible address.
general-purpose register Þle. These registers provide the source
operands and destination results for all integer data manipulation
instructions. Integer load instructions move data from memory to
GPRs and store instructions move data from GPRs to memory.
instruction and data.
Engineers that deÞnes operations and representations of binary
ßoating-point arithmetic.
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