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Part IV. Hardware Interface
17.3.4 Power Control
The user can perform a write cycle using one of the memory controller chip-select pins.
This data includes the controls to the analog switch such as the MAXIM MAX780.
However, no auto-power control is supported.
17.3.5 Reset and Three-State Control
The user can reset the PCMCIA cards or disable the output of the external latches by
writing to PGCRx[CxRESET] and PGCRx[CxOE], respectively.
17.3.6 DMA
The MPC860 DMA module with the CPM microcode provides two independent DMA
(IDMA) channels. See Section 20.3, ÒIDMA Emulation.Ó The PCMCIA module can be
programmed to generate control for an I/O device implemented as a PCMCIA card to
respond to DMA transfer. Any window can be programmed as a DMA window through
PORxB[PRS]. When conÞgured appropriately, the PCMCIA controller supplies the
required signals to the socket. Notice that DMA to and from the PCMCIA interface is
handled through dual-access DMA transfers
DMA requests can be supplied through SPKR, IOIS16, or INPACK. To support DMA,
INPACK should be connected to DREQ0 for slot A or to DREQ1 for slot B. The source for
a DMA request is programmed through PGCRB[CBDREQ]. If the internal DMA request
is disabled, the DMA request is assumed to be DREQ0/DREQ1 and port C should assign
PC15/14 as DREQ0/DREQ1. If the request is enabled, port C should not be programmed
to be DREQ0/DREQ1.
IOIS16
SPKR
DREQ0
CxDREQ0
Port C
CxDREQ0
Multiplexer
Logic
PortCDREQ0
Internal DMA Request
Figure 17-2. Internal DMA Request Logic
MOTOROLA
Chapter 17. PCMCIA Interface
17-7
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