Motorola MPC860 PowerQUICC User Manual page 789

Table 29-9. SCCE/SCCM Field Descriptions (Continued)
Bit Name
14 TXB Tx buffer. Set no sooner than when the last bit of the last byte of the buffer begins transmission,
assuming L is set in the TxBD. If it is not, TXB is set when the last byte is written to the transmit FIFO.
15 RXB Rx buffer. Set when a complete buffer was received on the SCC channel, no sooner than two serial
clocks after the last bit of the last byte in which the buffer is received on RXD.
29.13 SCC Status Register in Transparent Mode
(SCCS)
The SCC status register (SCCS) allows monitoring of real-time status conditions on the
RXD line. The real-time status of CTS and CD are part of the port C parallel I/O.
Bit 0
Field
Reset
R/W
Address
Figure 29-5. SCC Status Register in Transparent Mode (SCCS)
Table 29-10 describes SCCS Þelds.
Bit Name
0Ð5 Ñ Reserved, should be cleared.
6 CS Carrier sense (DPLL). Shows the real-time carrier sense of the line as determined by the DPLL.
0 The DPLL does not sense a carrier.
1 The DPLL senses a carrier.
7 Ñ Reserved, should be cleared.
29.14 SCC2 Transparent Programming Example
The following initialization sequence enables the transmitter and receiver, which operate
independently of each other. They implement the connection shown on MPC860(B) in
Figure 29-1. CLK3 externally provides transmit and receive clocks to MPC860(B). The
transparent controller is conÞgured with RTS2 and CD2 active and CTS2 is conÞgured to
be grounded internally in port C. A 16-bit CRC-CCITT is sent with each transparent frame.
The FIFOs are conÞgured for fast operation.
The transmit and receive clocks are externally provided to MPC860(B) using CLK3. SCC2
is used. The transparent controller is conÞgured with the RTS2 and CD2 pins active and
CTS2 is conÞgured to be grounded internally in port C. A 16-bit CRC-CCITT is sent with
each transparent frame. The FIFOs are conÞgured for fast operation.
MOTOROLA
1 2
Ñ
0xA17 (SCCS1), 0xA37 (SCCS2), 0xA57 (SCCS3), 0xA77 (SCCS4)
Table 29-10. SCCS Field Descriptions
Chapter 29. SCC Transparent Mode
Part V. The Communications Processor Module
Description
3 4 5
0000_0000
R
Description
6 7
CS Ñ
29-13