Motorola MPC860 PowerQUICC User Manual page 893

Bits 0 1 2
Field
Reset Ñ Ñ Ñ
R/W
Addr
Bits 16 17 18
Field DR16 DR17 DR18 DR19 DR20 DR21 DR22 DR23 DR24 DR25 DR26 DR27 DR28 DR29 DR30 DR31
Reset 0 0 0
R/W R/W R/W R/W
Addr
Figure 34-9. Port B Data Direction Register (PBDIR)
Table 34-9 describes PBDIR bits.
Bits Name
0Ð13 Ñ Reserved
14Ð31 DRn Port B data direction. ConÞgures port B signals as inputs or outputs when functioning as
general-purpose I/O; otherwise, used to select the peripheral function.
0 Select the signal for general-purpose input, or select peripheral function 0.
1 Select the signal for general-purpose output, or select peripheral function 1.
DR14 and DR15 are ignored when port B is used by the PIP controller.
34.3.1.4 Port B Pin Assignment Register (PBPAR)
The port B pin assignment register (PBPAR) conÞgures signals as general-purpose I/O or
dedicated for use with a peripheral.
Bits 0 1 2
Field
Reset Ñ Ñ Ñ
R/W
Addr
Bits 16 17 18
Field DD16 DD17 DD18 DD19 DD20 DD21 DD22 DD23 DD24 DD25 DD26 DD27 DD28 DD29 DD30 DD31
Reset 0 0 0
R/W R/W R/W R/W
Addr
Figure 34-10. Port B Pin Assignment Register (PBPAR)
MOTOROLA
3 4 5 6
Ñ
Ñ Ñ Ñ Ñ
Ñ
19 20 21 22
0 0 0 0
R/W R/W R/W R/W
Table 34-9. PBDIR Bit Descriptions
3 4 5 6
Ñ
Ñ Ñ Ñ Ñ
Ñ
19 20 21 22
0 0 0 0
R/W R/W R/W R/W
Chapter 34. Parallel I/O Ports
Part V. The Communications Processor Module
7 8 9 10
Ñ Ñ Ñ Ñ
0xAB8
23 24 25 26
0 0 0 0
R/W R/W R/W R/W
0xABA
Description
7 8 9 10
Ñ Ñ Ñ Ñ
0xABC
23 24 25 26
0 0 0 0
R/W R/W R/W R/W
0xABE
11 12 13 14
DR14 DR15
Ñ Ñ Ñ 0
R/W
27 28 29 30
0 0 0 0
R/W R/W R/W R/W
11 12 13 14
DD14 DD15
Ñ Ñ Ñ 0
R/W
27 28 29 30
0 0 0 0
R/W R/W R/W R/W
34-11
15
0
R/W
31
0
R/W
15
0
R/W
31
0
R/W