Motorola MPC860 PowerQUICC User Manual page 651

TCLK
TXD
(Output)
RTS
(Output)
CTS
(Input)
NOTE
:
1. A frame includes opening and closing ßags and syncs, if present in the protocol.
Figure 22-9. Output Delay from RTS Asserted for Synchronous Protocols
When RTS is asserted, if CTS is not already asserted, delays to the Þrst data bit depend on
when CTS is asserted. Figure 22-10 shows that the delay between CTS and the data can be
approximately 0.5 to 1 bit times or 0 bit times, depending on GSMR_H[CTSS].
TCLK
TXD
(Output)
RTS
(Output)
CTS
(Input)
NOTE
:
1. GSMR_H[CTSS] = 0. CTSP is a donÕt care.
TCLK
TXD
(Output)
RTS
(Output)
CTS
(Input)
NOTE
:
1. GSMR_H[CTSS] = 1. CTSP is a donÕt care.
Figure 22-10. Output Delay from CTS Asserted for Synchronous Protocols
If CTS is programmed to envelope data, negating it during frame transmission causes a
CTS lost error. Negating CTS forces RTS high and Tx data to become idle. If
GSMR_H[CTSS] is zero, the SCC must sample CTS before a CTS lost is recognized;
otherwise, the negation of CTS immediately causes the CTS lost condition. See
Figure 22-11.
MOTOROLA
First Bit of Frame Data
First Bit of Frame Data
CTS Sampled Low Here
First Bit of Frame Data
Chapter 22. Serial Communications Controllers
Part V. The Communications Processor Module
Last Bit of Frame Data
Last Bit of Frame Data
Last Bit of Frame Data
22-19