Motorola MPC860 PowerQUICC User Manual page 706

Table of Contents

Advertisement

Part V. The Communications Processor Module
TCLK
TXD
CTS
RTS
24.14.5 Using the Time-Slot Assigner (TSA)
HDLC bus controllers can be used with a time-division multiplexed transmission line and
a local bus, as shown in Figure 24-17. Local stations use time slots to communicate over
the TDM transmission line; stations that share a time slot use the HDLC bus protocol to
control access to the local bus.
Rx
Tx
Line Driver
L1RXD
NOTES:
1. All TXD pins of slave devices should be conÞgured to open-drain in the port C parallel I/O port.
2. The TSA in the SI of each station is used to conÞgure the preferred time slot.
3. The choice of the number of stations to share a time slot is user-deÞned. It is two in this example.
Figure 24-17. HDLC Bus TDM Transmission Line Configuration
The local SCCs in HDLC bus mode communicate only with the transmission line and not
with each other. The SCCs use the TSA of the serial interface, receiving and sending data
over L1TXDx and L1RXDx. Because collisions are still detected from the individual SCC
CTS pin, it must be conÞgured in port C to connect to the chosen SCC. Because the SCC
only receives clocks during its time slot, CTS is sampled only during the Tx clock edges of
the particular SCC time slot.
24-22
1st Bit
2nd Bit
Figure 24-16. Delayed RTS Mode
L1TXD
CTS
L1RXD
L1TXD
HDLC Bus
HDLC Bus
Controller
Controller
A
B
Stations share time-slot n
MPC860 PowerQUICC UserÕs Manual
Collision
3rd Bit
RTS active for
only 2 bit times
Local HDLC Bus
CTS
L1RXD
L1TXD
CTS
HDLC Bus
Controller
C
Stations share time-slot m
+ 5 V
R
L1RXD
L1TXD
CTS
HDLC Bus
Controller
D
MOTOROLA

Advertisement

Table of Contents
loading

Table of Contents