Motorola MPC860 PowerQUICC User Manual page 373

Bus Request (BR)
Receives Bus Grant (BG) from arbiter
Asserts Bus Busy (BB) if no other master is driving
Asserts Transfer Start (TS)
Drives address and attributes
Drives BURST asserted
Asserts burst data in progress (BDIP)
Negates Burst Data in Progress (BDIP)
Stops driving data
Figure 14-16. Basic Flow of a Burst Write Cycle
MOTOROLA
MASTER
Drives data
Drives data
Drives data
Drives data
Chapter 14. MPC860 External Bus Interface
Part IV. Hardware Interface
SLAVE
Receives address
Asserts Transfer Acknowledge (TA)
No
BDIP asserted
?
Yes
Asserts Transfer Acknowledge (TA)
No
BDIP asserted
?
Yes
Asserts Transfer Acknowledge (TA)
No
BDIP asserted
?
Yes
Asserts Transfer Acknowledge (TA)
No
BDIP asserted
?
Yes
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