Motorola MPC860 PowerQUICC User Manual page 156

Part II. PowerPC Microprocessor Module
6.2.2.2 Effective Address Calculation
An effective address (EA) is the 32-bit sum computed by the processor when executing a
memory access or branch instruction or when fetching the next sequential instruction. For
a memory access instruction, if the sum of the effective address and the operand length
exceeds the maximum effective address, the memory operand is considered to wrap around
from the maximum effective address through effective address 0, as described in the
following paragraphs.
Effective address computations for both data and instruction accesses use 32-bit unsigned
binary arithmetic. A carry from bit 0 is ignored.
Load and store operations have three categories of effective address generation:
¥ Register indirect with immediate index mode
¥ Register indirect with index mode
¥ Register indirect mode
Refer to Section 6.2.4.2.1, ÒInteger Load and Store Address Generation,Ó for further
discussion of effective address generation for load and store operations.
Branch instructions have three categories of effective address generation:
¥ Immediate
¥ Link register indirect
¥ Count register indirect
Refer to Section 6.2.4.3.1, ÒBranch Instruction Address Calculation,Ó for further discussion
of branch instruction effective address generation.
6.2.2.3 Synchronization
The synchronization described in this section refers to the state of the processor that is
performing the synchronization.
6.2.2.3.1 Context Synchronization
The System Call (sc) and Return from Interrupt (rÞ) instructions perform context
synchronization by allowing previously issued instructions to complete before performing
a change in context. Execution of one of these instructions ensures the following:
¥ No higher priority exception exists (sc).
¥ All previous instructions have completed to a point where they can no longer cause
an exception.
¥ Previous instructions complete execution in the context (privilege, protection, and
address translation) under which they were issued.
¥ The instructions following the sc or rÞ instruction execute in the context established
by these instructions.
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