Motorola MPC860 PowerQUICC User Manual page 1006

Part VI. Debug and Test
38.6 Recommended TAP ConÞguration
To ensure that the scan chain test logic is kept transparent to the system logic during normal
operation, the TAP should be forced into the test-logic-reset controller state by keeping
TRST or TMS continuously asserted.
The TAP signals must be conÞgured as follows to reset the scan chain logic:
¥ If both the TAP and low power mode are never used, connect TRST to ground.
¥ If the TAP or low power mode is used, connect TRST to PORESET.
¥ If power down mode (the lowest power mode, where V
connect TRST to PORESET through a diode (anode to TRST, cathode to
PORESET).
The TMS, TDI, and TRST signals include on-chip pull-up resistors. TCK, however, does
not have an on-chip pull-up or pull-down resistor; it should be pulled down through a
resistor.
To use the TAP to perform test operations, select the TAP functions in the hard reset
conÞguration word for the signals TCK/DSCK, TDI/DSDI, TDO/DSDO; see
Section 12.3.1.1, ÒHard Reset ConÞguration Word.Ó
38.7 Motorola MPC860 BSDL Description
The most current revision of the BSDL Þle for the MPC860 PowerQUICC is available at
the Motorola web site (www.mot.com) in the MPCxxx Embedded PowerPC area.
38-8 MPC860 PowerQUICC UserÕs Manual
is disabled) is used,
DDH
MOTOROLA