Motorola PowerQUICC II MPC8280 Series Reference Manual page 968

Superchannels
1
Offset Name Width
0x00 TBASE Hword TxBD base address. Used to calculate offset of the channel's TxBD table relative to the
0x02 TBPTR Hword TxBD pointer. Used to calculate offset of the current BD relative to the MCCBASE. TBPTR
0x04 RBASE Hword RxBD base address. Used to calculate offset of the channel's RxBD table relative to the
0x06 RBPTR Hword RxBD pointer. Used to calculate offset of the current BD relative to the MCCBASE. RBPTR
1
The offset relative to dual-port RAM base address + XTRABASE + 8*CH_NUM
29.5 Superchannels
A TDM may not be programmed to contiguously transmit more than one byte of data from
the same MCC channel. This is true whether the user wants to program more than one byte
in the same SI entry or have back-to-back SI entries for the same channel. Instead,
superchannelling is used to achieve sending multiple back-to-back bytes from the same
MCC channel. Refer to Section 15.4.3, "Programming SIx RAM Entries," for information
about how to program SIRAM entries as superchannelled timeslots.
A single MCC channel is the combination of one MCC FIFO and one set of related channel
parameters and buffer descriptors. A superchannel is the combination of multiple MCC TX
channels' FIFOs and one set of an MCC channel's parameters and buffer descriptors. In this
case, the one set of parameters and buffer descriptors is used to manage this group of FIFOs.
In effect, this provides the ability to construct a larger overall FIFO than that of a single
normal MCC TX channel.
MCC TX channels whose numbers appear in superchannelled SIRAM entries are
dedicating their TX FIFOs to that superchannel and may not be used for any other purpose
(i.e. cannot also be used elsewhere in a TDM as a normal channel). The FIFO of the channel
whose parameters are used to control a superchannel may still be used as part of the
superchannel.
Although a timeslot for a normal MCC channel may be of any length up to 8 bits, a
superchannelled timeslot must always be 8 bits.
Although a normal MCC transmit FIFO is 4 bytes, one that is used as part of a superchannel
is 2 bytes. Note that an MCC channel whose FIFO is in superchannel mode consumes twice
as much CPM bandwidth as a normal channel.
29-30
Freescale Semiconductor, Inc.
Table 29-14. Channel Extra Parameters
MCCBASE (The base address of the BD table for this channel MCCBASE+8*TBASE)
is user-initialized to TBASE before enabling the channel or after a fatal error before
reinitializing the channel. (The address of the BD in use for this channel
MCCBASE+8*TBPTR)
MCCBASE. (The base address of the BD table for this channel MCCBASE+8*RBASE)
is user-initialized to RBASE before enabling the channel or after a fatal error before
reinitializing the channel. (The address of the BD in use for this channel
MCCBASE+8*RTBPTR)
MPC8280 PowerQUICC II Family Reference Manual
For More Information On This Product,
Go to: www.freescale.com
Description
MOTOROLA