Motorola PowerQUICC II MPC8280 Series Reference Manual page 1390

2
I C Commands
40.6 I C Commands
2
2
The I C transmit and receive commands, shown in Table 40-8, are issued to the CP
command register (CPCR).
Table 40-8. I
Command
Initializes all transmit parameters in the parameter RAM to their reset state. Should be issued only when
INIT TX
the transmitter is disabled. The
PARAMETERS
Tx and Rx parameters.
2
Forces the I C controller to close the current Rx BD and use the next BD for subsequently received data.
CLOSE RXBD
If the controller is not receiving data, no action is taken. Use this command to extract data from a partially
full buffer.
Initializes all receive parameters in the parameter RAM to their reset state. Should be issued only when
INIT RX
the receiver is disabled. The
PARAMETERS
Tx and Rx parameters.
40.7 The I C Buffer Descriptor (BD) Table
2
As shown in Figure 40-12, buffer descriptors (BDs) are organized into separate RxBD and
TxBD tables in dual-port RAM. The tables have the same basic configuration as for the
SCCs and SMCs and form circular queues that determine the order buffers are transferred.
The CP uses BDs to confirm reception and transmission or to indicate error conditions so
that the core knows buffers have been serviced. The buffers themselves can be placed in
external memory or in any unused parameter area of the dual-port RAM.
Dual-Port RAM
Tx Buffer
I2C TxBD Table
I2C RxBD Table
I2C RxBD Table Pointer
(RBASE)
I2C TxBD Table Pointer
(TBASE)
40-12
Freescale Semiconductor, Inc.
2
C Transmit/Receive Commands
INIT TX AND RX PARAMETERS
INIT TX AND RX PARAMETERS
TxBD Table
Status and Control
Data Length
Buffer Pointer
RxBD Table
Status and Control
Data Length
Buffer Pointer
Figure 40-12. I 2 C Memory Structure
MPC8280 PowerQUICC II Family Reference Manual
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Description
command can also be used to reset both the
command can also be used to reset both the
External Memory
Tx Buffer
Rx Buffer
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