Motorola PowerQUICC II MPC8280 Series Reference Manual page 510

User-Programmable Machines (UPMs)
positive edges of T[1–4], plus a circuit delay time as specified in the Hardware
Specifications.
For integer clock ratios, the widths of T1/2/3/4 are equal, for a
1:2.5 clock ratio, T1 = 4/3*T2 and T3 = 4/3*T4, and for a 1:3.5
clock ratio, the ticks widths are T1 = 3/2*T2 and T3 = 3/2*T4.
CLKIN
T1
T2
T3
T4
Figure 11-58. Memory Controller UPM Clock Scheme for Integer Clock Ratios
CLKIN
T1
T2
T3
T4
Figure 11-59. Memory Controller UPM Clock Scheme for Non-Integer (2.5:1/3.5:1)
The state of the external signals may change (if specified in the RAM array) at any positive
edge of T1, T2, T3, or T4 (there is a propagation delay specified in the Hardware
Specifications). Note however that only the CS signal corresponding to the currently
11-72
Freescale Semiconductor, Inc.
NOTE
Clock Ratios
MPC8280 PowerQUICC II Family Reference Manual
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