Motorola PowerQUICC II MPC8280 Series Reference Manual page 1461

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RxBD, 21-16
serial management controllers
character mode, 28-13
commands, 28-13
data handling, 28-13
error handling, 28-15
features list, 28-12
features not supported by SMCs, 28-11
frame format, 28-12
message-oriented mode, 28-13
overview, 28-11
parameter RAM, 28-7
programming example, 28-21
reception process, 28-13
RxBD, 28-15
transmission process, 28-12
TxBD, 28-18
S-records loader application, 21-24
status reporting, 21-6
synchronous mode, 21-3
TxBD, 21-19
Universal serial bus (USB) controller
buffer descriptor ring, 27-23
clocking and pin functions, 27-3
commands
CP commands, 27-34
RESTART Tx command, 27-35
STOP Tx command, 27-35
enabling, 27-1
endpoint parameter block, 27-14
EPxPTR, 27-14
error handling, 27-35
errors
transmission errors, 27-35
features, 27-2
FRAME_N, 27-16
function mode, 27-4
transmit buffer descriptor (Tx BD), 27-28
transmit/receive, 27-5
host mode, 27-8
SOF transmission, 27-13
transmit buffer descriptor (Tx BD), 27-30
transmit/receive, 27-9
limitations, unsupported tasks, 27-2
overview, 27-1
parameter RAM, 27-13
memory map, 27-13
programming model, 27-17
receive buffer descriptor (Rx BD), 27-26
registers
RFCR (receive function code register), 27-17
TFCR (transmit function code register), 27-17
USADR (USB slave address register), 27-18
USBER (USB slave address register), 27-21
MOTOROLA
Freescale Semiconductor, Inc.
Index
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Go to: www.freescale.com
USBMR (USB mask register), 27-22
USBS (USB status register), 27-22
USCOM (USB command register), 27-20
n
USEP
(USB endpoint registers 1–4), 27-19
USMOD (USB mode register), 27-18
tokens, 27-7, 27-11
UPMs (user-programmable machines)
access times, handling devices, 11-106
address control bits, 11-81
address mulitplexing, 11-81
clock timing, 11-71
data sample control, 11-82
data valid, 11-82
differences between MPC8xx and MPC8280, 11-85
DRAM configuration example, 11-84
EDO interface example, 11-97
exception requests, 11-71
hierarchical bus interface example, 11-106
implementation differences with SDRAM machine
and GPCM, 11-7
loop control, 11-80
memory access requests, 11-69
memory system interface example, 11-86
MPC8xx versus MPC8280, 11-85
overview, 11-66
programming the UPM, 11-71
RAM array, 11-73
RAM word, 11-74
refresh timer requests, 11-70
register settings, 11-85
requests, 11-68
signal negation, 11-82
software requests, 11-71
UPWAIT signal, 11-83
wait mechanism, 11-83
Index-27

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